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Soren Brinkmann76fcae32016-03-06 20:16:27 -08001/*
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +01002 * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
Soren Brinkmann76fcae32016-03-06 20:16:27 -08003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08005 */
6
7#include <bl_common.h>
8#include <console.h>
9#include <debug.h>
10#include <platform_tsp.h>
Soren Brinkmann76fcae32016-03-06 20:16:27 -080011#include <plat_arm.h>
Soren Brinkmann76fcae32016-03-06 20:16:27 -080012#include "../zynqmp_private.h"
13
Soren Brinkmann76fcae32016-03-06 20:16:27 -080014#define BL32_END (unsigned long)(&__BL32_END__)
15
Soren Brinkmann76fcae32016-03-06 20:16:27 -080016/*******************************************************************************
17 * Initialize the UART
18 ******************************************************************************/
19void tsp_early_platform_setup(void)
20{
21 /*
22 * Initialize a different console than already in use to display
23 * messages from TSP
24 */
Soren Brinkmann99c0d7b2016-06-10 09:57:14 -070025 console_init(ZYNQMP_UART_BASE, zynqmp_get_uart_clk(),
Soren Brinkmann76fcae32016-03-06 20:16:27 -080026 ZYNQMP_UART_BAUDRATE);
27
28 /* Initialize the platform config for future decision making */
29 zynqmp_config_setup();
30}
31
32/*******************************************************************************
33 * Perform platform specific setup placeholder
34 ******************************************************************************/
35void tsp_platform_setup(void)
36{
37 plat_arm_gic_driver_init();
38 plat_arm_gic_init();
39}
40
41/*******************************************************************************
42 * Perform the very early platform specific architectural setup here. At the
43 * moment this is only intializes the MMU
44 ******************************************************************************/
45void tsp_plat_arch_setup(void)
46{
Soren Brinkmann6d1ba582016-07-08 14:45:14 -070047 arm_setup_page_tables(BL32_BASE,
48 BL32_END - BL32_BASE,
49 BL_CODE_BASE,
Masahiro Yamada51bef612017-01-18 02:10:08 +090050 BL_CODE_END,
Soren Brinkmann6d1ba582016-07-08 14:45:14 -070051 BL_RO_DATA_BASE,
Masahiro Yamada51bef612017-01-18 02:10:08 +090052 BL_RO_DATA_END,
Masahiro Yamada0fac5af2016-12-28 16:11:41 +090053 BL_COHERENT_RAM_BASE,
54 BL_COHERENT_RAM_END
Soren Brinkmann76fcae32016-03-06 20:16:27 -080055 );
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +010056 enable_mmu_el1(0);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080057}