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developer8670d252021-03-19 22:13:11 +08001#
2# Copyright (c) 2021, MediaTek Inc. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7MTK_PLAT := plat/mediatek
8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
9
10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
christine.zhua22c10b2021-03-24 21:44:52 +080011 -I${MTK_PLAT}/common/drivers/gic600/ \
developer8670d252021-03-19 22:13:11 +080012 -I${MTK_PLAT_SOC}/include/
13
christine.zhua22c10b2021-03-24 21:44:52 +080014GICV3_SUPPORT_GIC600 := 1
developer8670d252021-03-19 22:13:11 +080015include drivers/arm/gic/v3/gicv3.mk
16include lib/xlat_tables_v2/xlat_tables.mk
17
18PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \
19 ${XLAT_TABLES_LIB_SRCS} \
20 plat/common/aarch64/crash_console_helpers.S \
21 plat/common/plat_psci_common.c
22
23
24BL31_SOURCES += common/desc_image_load.c \
25 drivers/ti/uart/aarch64/16550_console.S \
26 lib/bl_aux_params/bl_aux_params.c \
27 lib/cpus/aarch64/cortex_a55.S \
28 lib/cpus/aarch64/cortex_a78.S \
29 plat/common/plat_gicv3.c \
christine.zhua22c10b2021-03-24 21:44:52 +080030 ${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \
developer8273a602021-03-25 11:26:46 +080031 ${MTK_PLAT}/common/mtk_cirq.c \
developer8670d252021-03-19 22:13:11 +080032 ${MTK_PLAT}/common/mtk_plat_common.c \
33 ${MTK_PLAT}/common/params_setup.c \
34 ${MTK_PLAT_SOC}/aarch64/platform_common.c \
35 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
36 ${MTK_PLAT_SOC}/bl31_plat_setup.c \
37 ${MTK_PLAT_SOC}/plat_pm.c \
38 ${MTK_PLAT_SOC}/plat_topology.c
39
40# Configs for A78 and A55
41HW_ASSISTED_COHERENCY := 1
42USE_COHERENT_MEM := 0
43CTX_INCLUDE_AARCH32_REGS := 0
44ERRATA_A55_1530923 := 1
45
46# indicate the reset vector address can be programmed
47PROGRAMMABLE_RESET_ADDRESS := 1
48
49COLD_BOOT_SINGLE_CPU := 1
50
51MACH_MT8195 := 1
52$(eval $(call add_define,MACH_MT8195))
53
54include lib/coreboot/coreboot.mk