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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Antonio Nino Diaze3887a92019-01-30 20:29:50 +00002 * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Dan Handley2bd4ef22014-04-09 13:14:54 +01007#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
Dan Handleyed6ff952014-05-14 17:44:19 +01009#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <arch.h>
12#include <arch_helpers.h>
13#include <bl1/bl1.h>
14#include <common/bl_common.h>
15#include <common/debug.h>
16#include <drivers/auth/auth_mod.h>
17#include <drivers/console.h>
18#include <lib/cpus/errata_report.h>
19#include <lib/utils.h>
20#include <plat/common/platform.h>
Antonio Nino Diaz3c817f42018-03-21 10:49:27 +000021#include <smccc_helpers.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000022#include <tools_share/uuid.h>
23
Isla Mitchell99305012017-07-11 14:54:08 +010024#include "bl1_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010025
Yatharth Kochar71c9a5e2015-10-10 19:06:53 +010026/* BL1 Service UUID */
Roberto Vargaseace8f12018-04-26 13:36:53 +010027DEFINE_SVC_UUID2(bl1_svc_uid,
28 0xd46739fd, 0xcb72, 0x9a4d, 0xb5, 0x75,
Yatharth Kochar71c9a5e2015-10-10 19:06:53 +010029 0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a);
30
Yatharth Kochara65be2f2015-10-09 18:06:13 +010031static void bl1_load_bl2(void);
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010032
Sandrine Bailleux467d0572014-06-24 14:02:34 +010033/*******************************************************************************
Soby Mathew6e16a332018-01-10 12:51:34 +000034 * Helper utility to calculate the BL2 memory layout taking into consideration
35 * the BL1 RW data assuming that it is at the top of the memory layout.
Sandrine Bailleux467d0572014-06-24 14:02:34 +010036 ******************************************************************************/
Soby Mathew6e16a332018-01-10 12:51:34 +000037void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
38 meminfo_t *bl2_mem_layout)
Sandrine Bailleux467d0572014-06-24 14:02:34 +010039{
Sandrine Bailleux467d0572014-06-24 14:02:34 +010040 assert(bl1_mem_layout != NULL);
41 assert(bl2_mem_layout != NULL);
42
Yatharth Kochar51f76f62016-09-12 16:10:33 +010043 /*
44 * Remove BL1 RW data from the scope of memory visible to BL2.
45 * This is assuming BL1 RW data is at the top of bl1_mem_layout.
46 */
47 assert(BL1_RW_BASE > bl1_mem_layout->total_base);
48 bl2_mem_layout->total_base = bl1_mem_layout->total_base;
49 bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base;
Sandrine Bailleux467d0572014-06-24 14:02:34 +010050
51 flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t));
52}
Soby Mathew6e16a332018-01-10 12:51:34 +000053
Sandrine Bailleux467d0572014-06-24 14:02:34 +010054/*******************************************************************************
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000055 * Setup function for BL1.
56 ******************************************************************************/
57void bl1_setup(void)
58{
59 /* Perform early platform-specific setup */
60 bl1_early_platform_setup();
61
62#ifdef AARCH64
63 /*
64 * Update pointer authentication key before the MMU is enabled. It is
65 * saved in the rodata section, that can be writen before enabling the
66 * MMU. This function must be called after the console is initialized
67 * in the early platform setup.
68 */
69 bl_handle_pauth();
70#endif /* AARCH64 */
71
72 /* Perform late platform-specific setup */
73 bl1_plat_arch_setup();
74}
75
76/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010077 * Function to perform late architectural and platform specific initialization.
Yatharth Kochara65be2f2015-10-09 18:06:13 +010078 * It also queries the platform to load and run next BL image. Only called
79 * by the primary cpu after a cold boot.
80 ******************************************************************************/
Achin Gupta4f6ad662013-10-25 09:08:21 +010081void bl1_main(void)
82{
Yatharth Kochara65be2f2015-10-09 18:06:13 +010083 unsigned int image_id;
84
Dan Handley91b624e2014-07-29 17:14:00 +010085 /* Announce our arrival */
86 NOTICE(FIRMWARE_WELCOME_STR);
87 NOTICE("BL1: %s\n", version_string);
88 NOTICE("BL1: %s\n", build_message);
89
Yatharth Kochar5d361212016-06-28 17:07:09 +010090 INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE,
91 (void *)BL1_RAM_LIMIT);
Dan Handley91b624e2014-07-29 17:14:00 +010092
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +000093 print_errata_status();
Achin Gupta4f6ad662013-10-25 09:08:21 +010094
Antonio Nino Diaz3759e3f2017-03-22 15:48:51 +000095#if ENABLE_ASSERTIONS
Yatharth Kochar5d361212016-06-28 17:07:09 +010096 u_register_t val;
Achin Gupta4f6ad662013-10-25 09:08:21 +010097 /*
98 * Ensure that MMU/Caches and coherency are turned on
99 */
Yatharth Kochar5d361212016-06-28 17:07:09 +0100100#ifdef AARCH32
101 val = read_sctlr();
102#else
Dan Handley0cdebbd2015-03-30 17:15:16 +0100103 val = read_sctlr_el3();
Yatharth Kochar5d361212016-06-28 17:07:09 +0100104#endif
Andrew Thoelke5e287b52015-06-11 14:12:14 +0100105 assert(val & SCTLR_M_BIT);
106 assert(val & SCTLR_C_BIT);
107 assert(val & SCTLR_I_BIT);
Dan Handley0cdebbd2015-03-30 17:15:16 +0100108 /*
109 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the
110 * provided platform value
111 */
112 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK;
113 /*
114 * If CWG is zero, then no CWG information is available but we can
115 * at least check the platform value is less than the architectural
116 * maximum.
117 */
118 if (val != 0)
119 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val));
120 else
121 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE);
Antonio Nino Diaz3759e3f2017-03-22 15:48:51 +0000122#endif /* ENABLE_ASSERTIONS */
Achin Gupta4f6ad662013-10-25 09:08:21 +0100123
124 /* Perform remaining generic architectural setup from EL3 */
125 bl1_arch_setup();
126
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100127#if TRUSTED_BOARD_BOOT
128 /* Initialize authentication module */
129 auth_mod_init();
130#endif /* TRUSTED_BOARD_BOOT */
131
Achin Gupta4f6ad662013-10-25 09:08:21 +0100132 /* Perform platform setup in BL1. */
133 bl1_platform_setup();
134
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100135 /* Get the image id of next image to load and run. */
136 image_id = bl1_plat_get_next_image_id();
137
Yatharth Kochar71c9a5e2015-10-10 19:06:53 +0100138 /*
139 * We currently interpret any image id other than
140 * BL2_IMAGE_ID as the start of firmware update.
141 */
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100142 if (image_id == BL2_IMAGE_ID)
143 bl1_load_bl2();
Yatharth Kochar71c9a5e2015-10-10 19:06:53 +0100144 else
145 NOTICE("BL1-FWU: *******FWU Process Started*******\n");
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100146
147 bl1_prepare_next_image(image_id);
Antonio Nino Diaze3962d02017-02-16 16:17:19 +0000148
149 console_flush();
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100150}
151
152/*******************************************************************************
153 * This function locates and loads the BL2 raw binary image in the trusted SRAM.
154 * Called by the primary cpu after a cold boot.
155 * TODO: Add support for alternative image load mechanism e.g using virtio/elf
156 * loader etc.
157 ******************************************************************************/
Roberto Vargasbcfaeff2018-02-12 12:36:17 +0000158static void bl1_load_bl2(void)
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100159{
160 image_desc_t *image_desc;
161 image_info_t *image_info;
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100162 int err;
163
164 /* Get the image descriptor */
165 image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID);
166 assert(image_desc);
167
168 /* Get the image info */
169 image_info = &image_desc->image_info;
Juan Castillo3a66aca2015-04-13 17:36:19 +0100170 INFO("BL1: Loading BL2\n");
171
Soby Mathew2f38ce32018-02-08 17:45:12 +0000172 err = bl1_plat_handle_pre_image_load(BL2_IMAGE_ID);
Masahiro Yamada43d20b32018-02-01 16:46:18 +0900173 if (err) {
174 ERROR("Failure in pre image load handling of BL2 (%d)\n", err);
175 plat_error_handler(err);
176 }
177
Yatharth Kochar51f76f62016-09-12 16:10:33 +0100178 err = load_auth_image(BL2_IMAGE_ID, image_info);
Vikram Kanigirida567432014-04-15 18:08:08 +0100179 if (err) {
Dan Handley91b624e2014-07-29 17:14:00 +0100180 ERROR("Failed to load BL2 firmware.\n");
Juan Castillo26ae5832015-09-25 15:41:14 +0100181 plat_error_handler(err);
Vikram Kanigirida567432014-04-15 18:08:08 +0100182 }
Juan Castillod227d8b2015-01-07 13:49:59 +0000183
Masahiro Yamada43d20b32018-02-01 16:46:18 +0900184 /* Allow platform to handle image information. */
Soby Mathew2f38ce32018-02-08 17:45:12 +0000185 err = bl1_plat_handle_post_image_load(BL2_IMAGE_ID);
Masahiro Yamada43d20b32018-02-01 16:46:18 +0900186 if (err) {
187 ERROR("Failure in post image load handling of BL2 (%d)\n", err);
188 plat_error_handler(err);
189 }
190
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100191 NOTICE("BL1: Booting BL2\n");
Achin Gupta4f6ad662013-10-25 09:08:21 +0100192}
193
194/*******************************************************************************
Yatharth Kochar5d361212016-06-28 17:07:09 +0100195 * Function called just before handing over to the next BL to inform the user
196 * about the boot progress. In debug mode, also print details about the BL
197 * image's execution context.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100198 ******************************************************************************/
Yatharth Kochar5d361212016-06-28 17:07:09 +0100199void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100200{
Yatharth Kochar5d361212016-06-28 17:07:09 +0100201#ifdef AARCH32
202 NOTICE("BL1: Booting BL32\n");
203#else
Juan Castillo7d199412015-12-14 09:35:25 +0000204 NOTICE("BL1: Booting BL31\n");
Yatharth Kochar5d361212016-06-28 17:07:09 +0100205#endif /* AARCH32 */
206 print_entry_point_info(bl_ep_info);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100207}
Sandrine Bailleuxb7e97c42015-11-10 10:01:19 +0000208
209#if SPIN_ON_BL1_EXIT
210void print_debug_loop_message(void)
211{
212 NOTICE("BL1: Debug loop, spinning forever\n");
213 NOTICE("BL1: Please connect the debugger to continue\n");
214}
215#endif
Yatharth Kochar71c9a5e2015-10-10 19:06:53 +0100216
217/*******************************************************************************
218 * Top level handler for servicing BL1 SMCs.
219 ******************************************************************************/
220register_t bl1_smc_handler(unsigned int smc_fid,
221 register_t x1,
222 register_t x2,
223 register_t x3,
224 register_t x4,
225 void *cookie,
226 void *handle,
227 unsigned int flags)
228{
229
230#if TRUSTED_BOARD_BOOT
231 /*
232 * Dispatch FWU calls to FWU SMC handler and return its return
233 * value
234 */
235 if (is_fwu_fid(smc_fid)) {
236 return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie,
237 handle, flags);
238 }
239#endif
240
241 switch (smc_fid) {
242 case BL1_SMC_CALL_COUNT:
243 SMC_RET1(handle, BL1_NUM_SMC_CALLS);
244
245 case BL1_SMC_UID:
246 SMC_UUID_RET(handle, bl1_svc_uid);
247
248 case BL1_SMC_VERSION:
249 SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER);
250
251 default:
252 break;
253 }
254
255 WARN("Unimplemented BL1 SMC Call: 0x%x \n", smc_fid);
256 SMC_RET1(handle, SMC_UNK);
257}
dp-armcdd03cb2017-02-15 11:07:55 +0000258
259/*******************************************************************************
260 * BL1 SMC wrapper. This function is only used in AArch32 mode to ensure ABI
261 * compliance when invoking bl1_smc_handler.
262 ******************************************************************************/
263register_t bl1_smc_wrapper(uint32_t smc_fid,
264 void *cookie,
265 void *handle,
266 unsigned int flags)
267{
268 register_t x1, x2, x3, x4;
269
270 assert(handle);
271
272 get_smc_params_from_ctx(handle, x1, x2, x3, x4);
273 return bl1_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags);
274}