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Yann Gautiercaf575b2018-07-24 17:18:19 +02001/*
Yann Gautier6d8c2442020-09-17 12:42:46 +02002 * Copyright (c) 2017-2022, STMicroelectronics - All Rights Reserved
Yann Gautiercaf575b2018-07-24 17:18:19 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00007#include <drivers/st/stm32mp1_ddr_helpers.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008#include <lib/mmio.h>
Yann Gautiercaf575b2018-07-24 17:18:19 +02009
Yann Gautier6d8c2442020-09-17 12:42:46 +020010#include <platform_def.h>
11
Yann Gautiercaf575b2018-07-24 17:18:19 +020012void ddr_enable_clock(void)
13{
Yann Gautiere4a3c352019-02-14 10:53:33 +010014 stm32mp1_clk_rcc_regs_lock();
15
Yann Gautier3d78a2e2019-02-14 11:01:20 +010016 mmio_setbits_32(stm32mp_rcc_base() + RCC_DDRITFCR,
Yann Gautiercaf575b2018-07-24 17:18:19 +020017 RCC_DDRITFCR_DDRC1EN |
Yann Gautier6d8c2442020-09-17 12:42:46 +020018#if STM32MP_DDR_DUAL_AXI_PORT
Yann Gautiercaf575b2018-07-24 17:18:19 +020019 RCC_DDRITFCR_DDRC2EN |
Yann Gautier6d8c2442020-09-17 12:42:46 +020020#endif
Yann Gautiercaf575b2018-07-24 17:18:19 +020021 RCC_DDRITFCR_DDRPHYCEN |
22 RCC_DDRITFCR_DDRPHYCAPBEN |
23 RCC_DDRITFCR_DDRCAPBEN);
Yann Gautiere4a3c352019-02-14 10:53:33 +010024
25 stm32mp1_clk_rcc_regs_unlock();
Yann Gautiercaf575b2018-07-24 17:18:19 +020026}