blob: c66c9e707a737bd7b6e0447dd2689fcc6b23ac69 [file] [log] [blame]
Yann Gautiercaf575b2018-07-24 17:18:19 +02001/*
Yann Gautierb5d2ed42019-02-14 11:13:50 +01002 * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved
Yann Gautiercaf575b2018-07-24 17:18:19 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Yann Gautiercaf575b2018-07-24 17:18:19 +02007#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
9#include <drivers/st/stm32mp1_ddr_helpers.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <lib/mmio.h>
Yann Gautiercaf575b2018-07-24 17:18:19 +020011
12void ddr_enable_clock(void)
13{
Yann Gautier3d78a2e2019-02-14 11:01:20 +010014 mmio_setbits_32(stm32mp_rcc_base() + RCC_DDRITFCR,
Yann Gautiercaf575b2018-07-24 17:18:19 +020015 RCC_DDRITFCR_DDRC1EN |
16 RCC_DDRITFCR_DDRC2EN |
17 RCC_DDRITFCR_DDRPHYCEN |
18 RCC_DDRITFCR_DDRPHYCAPBEN |
19 RCC_DDRITFCR_DDRCAPBEN);
20}