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Dan Handley9df48042015-03-19 18:58:55 +00001/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#ifndef __PLAT_ARM_H__
31#define __PLAT_ARM_H__
32
33#include <bakery_lock.h>
34#include <bl_common.h>
35#include <cassert.h>
36#include <cpu_data.h>
37#include <stdint.h>
Soby Mathewfe3b5762015-10-27 10:31:35 +000038#include <xlat_tables.h>
Dan Handley9df48042015-03-19 18:58:55 +000039
Dan Handley9df48042015-03-19 18:58:55 +000040/*
41 * Extern declarations common to ARM standard platforms
42 */
43extern const mmap_region_t plat_arm_mmap[];
44
45#define ARM_CASSERT_MMAP \
46 CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \
47 <= MAX_MMAP_REGIONS, \
48 assert_max_mmap_regions);
49
50/*
51 * Utility functions common to ARM standard platforms
52 */
53
54void arm_configure_mmu_el1(unsigned long total_base,
55 unsigned long total_size,
56 unsigned long ro_start,
57 unsigned long ro_limit
58#if USE_COHERENT_MEM
59 , unsigned long coh_start,
60 unsigned long coh_limit
61#endif
62);
63void arm_configure_mmu_el3(unsigned long total_base,
64 unsigned long total_size,
65 unsigned long ro_start,
66 unsigned long ro_limit
67#if USE_COHERENT_MEM
68 , unsigned long coh_start,
69 unsigned long coh_limit
70#endif
71);
72
73#if IMAGE_BL31
Dan Handley9df48042015-03-19 18:58:55 +000074/*
75 * Use this macro to instantiate lock before it is used in below
76 * arm_lock_xxx() macros
77 */
Vikram Kanigirid79214c2015-09-09 10:52:13 +010078#define ARM_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_lock);
Dan Handley9df48042015-03-19 18:58:55 +000079
80/*
81 * These are wrapper macros to the Coherent Memory Bakery Lock API.
82 */
83#define arm_lock_init() bakery_lock_init(&arm_lock)
84#define arm_lock_get() bakery_lock_get(&arm_lock)
85#define arm_lock_release() bakery_lock_release(&arm_lock)
86
87#else
88
Dan Handley9df48042015-03-19 18:58:55 +000089/*
Vikram Kanigirid79214c2015-09-09 10:52:13 +010090 * Empty macros for all other BL stages other than BL3-1
Dan Handley9df48042015-03-19 18:58:55 +000091 */
Dan Handley9df48042015-03-19 18:58:55 +000092#define ARM_INSTANTIATE_LOCK
93#define arm_lock_init()
94#define arm_lock_get()
95#define arm_lock_release()
96
97#endif /* IMAGE_BL31 */
98
Soby Mathew7799cf72015-04-16 14:49:09 +010099#if ARM_RECOM_STATE_ID_ENC
100/*
101 * Macros used to parse state information from State-ID if it is using the
102 * recommended encoding for State-ID.
103 */
104#define ARM_LOCAL_PSTATE_WIDTH 4
105#define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
106
107/* Macros to construct the composite power state */
108
109/* Make composite power state parameter till power level 0 */
110#if PSCI_EXTENDED_STATE_ID
111
112#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
113 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
114#else
115#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
116 (((lvl0_state) << PSTATE_ID_SHIFT) | \
117 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
118 ((type) << PSTATE_TYPE_SHIFT))
119#endif /* __PSCI_EXTENDED_STATE_ID__ */
120
121/* Make composite power state parameter till power level 1 */
122#define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
123 (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
124 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
125
Soby Mathewa869de12015-05-08 10:18:59 +0100126/* Make composite power state parameter till power level 2 */
127#define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
128 (((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
129 arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
130
Soby Mathew7799cf72015-04-16 14:49:09 +0100131#endif /* __ARM_RECOM_STATE_ID_ENC__ */
132
Dan Handley9df48042015-03-19 18:58:55 +0000133
134/* CCI utility functions */
135void arm_cci_init(void);
136
137/* IO storage utility functions */
138void arm_io_setup(void);
139
140/* Security utility functions */
141void arm_tzc_setup(void);
142
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100143/* Systimer utility function */
144void arm_configure_sys_timer(void);
145
Dan Handley9df48042015-03-19 18:58:55 +0000146/* PM utility functions */
Soby Mathewfec4eb72015-07-01 16:16:20 +0100147int arm_validate_power_state(unsigned int power_state,
148 psci_power_state_t *req_state);
Soby Mathew0d9e8522015-07-15 13:36:24 +0100149int arm_validate_ns_entrypoint(uintptr_t entrypoint);
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100150void arm_system_pwr_domain_resume(void);
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000151void arm_program_trusted_mailbox(uintptr_t address);
Soby Mathewfec4eb72015-07-01 16:16:20 +0100152
153/* Topology utility function */
154int arm_check_mpidr(u_register_t mpidr);
Dan Handley9df48042015-03-19 18:58:55 +0000155
156/* BL1 utility functions */
157void arm_bl1_early_platform_setup(void);
158void arm_bl1_platform_setup(void);
159void arm_bl1_plat_arch_setup(void);
160
161/* BL2 utility functions */
162void arm_bl2_early_platform_setup(meminfo_t *mem_layout);
163void arm_bl2_platform_setup(void);
164void arm_bl2_plat_arch_setup(void);
165uint32_t arm_get_spsr_for_bl32_entry(void);
166uint32_t arm_get_spsr_for_bl33_entry(void);
167
168/* BL3-1 utility functions */
169void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
170 void *plat_params_from_bl2);
171void arm_bl31_platform_setup(void);
172void arm_bl31_plat_arch_setup(void);
173
174/* TSP utility functions */
175void arm_tsp_early_platform_setup(void);
176
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100177/* FIP TOC validity check */
178int arm_io_is_toc_valid(void);
Dan Handley9df48042015-03-19 18:58:55 +0000179
180/*
181 * Mandatory functions required in ARM standard platforms
182 */
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000183void plat_arm_gic_driver_init(void);
Dan Handley9df48042015-03-19 18:58:55 +0000184void plat_arm_gic_init(void);
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000185void plat_arm_gic_cpuif_enable(void);
186void plat_arm_gic_cpuif_disable(void);
187void plat_arm_gic_pcpu_init(void);
Dan Handley9df48042015-03-19 18:58:55 +0000188void plat_arm_security_setup(void);
189void plat_arm_pwrc_setup(void);
190
191/*
192 * Optional functions required in ARM standard platforms
193 */
194void plat_arm_io_setup(void);
195int plat_arm_get_alt_image_source(
Juan Castillo3a66aca2015-04-13 17:36:19 +0100196 unsigned int image_id,
197 uintptr_t *dev_handle,
198 uintptr_t *image_spec);
Soby Mathewfec4eb72015-07-01 16:16:20 +0100199unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
Dan Handley9df48042015-03-19 18:58:55 +0000200
201
202#endif /* __PLAT_ARM_H__ */