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Yatharth Kochardafb2472016-06-30 14:52:12 +01001/*
Antonio Nino Diaz6e4b0832019-01-31 10:48:47 +00002 * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
Yatharth Kochardafb2472016-06-30 14:52:12 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Yatharth Kochardafb2472016-06-30 14:52:12 +01005 */
6
7#include <arch.h>
8#include <asm_macros.S>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009#include <common/bl_common.h>
Yatharth Kochardafb2472016-06-30 14:52:12 +010010
11 .globl bl2_vector_table
12 .globl bl2_entrypoint
13
14
15vector_base bl2_vector_table
16 b bl2_entrypoint
17 b report_exception /* Undef */
18 b report_exception /* SVC call */
19 b report_exception /* Prefetch abort */
20 b report_exception /* Data abort */
21 b report_exception /* Reserved */
22 b report_exception /* IRQ */
23 b report_exception /* FIQ */
24
25
26func bl2_entrypoint
27 /*---------------------------------------------
Soby Mathew73308d02018-01-09 14:36:14 +000028 * Save arguments x0 - x3 from BL1 for future
29 * use.
Yatharth Kochardafb2472016-06-30 14:52:12 +010030 * ---------------------------------------------
31 */
Soby Mathew73308d02018-01-09 14:36:14 +000032 mov r9, r0
33 mov r10, r1
34 mov r11, r2
35 mov r12, r3
Yatharth Kochardafb2472016-06-30 14:52:12 +010036
37 /* ---------------------------------------------
38 * Set the exception vector to something sane.
39 * ---------------------------------------------
40 */
41 ldr r0, =bl2_vector_table
42 stcopr r0, VBAR
43 isb
44
45 /* -----------------------------------------------------
46 * Enable the instruction cache
47 * -----------------------------------------------------
48 */
49 ldcopr r0, SCTLR
50 orr r0, r0, #SCTLR_I_BIT
51 stcopr r0, SCTLR
52 isb
53
54 /* ---------------------------------------------
55 * Since BL2 executes after BL1, it is assumed
56 * here that BL1 has already has done the
57 * necessary register initializations.
58 * ---------------------------------------------
59 */
60
61 /* ---------------------------------------------
62 * Invalidate the RW memory used by the BL2
63 * image. This includes the data and NOBITS
64 * sections. This is done to safeguard against
65 * possible corruption of this memory by dirty
66 * cache lines in a system cache as a result of
67 * use by an earlier boot loader stage.
68 * ---------------------------------------------
69 */
70 ldr r0, =__RW_START__
71 ldr r1, =__RW_END__
72 sub r1, r1, r0
73 bl inv_dcache_range
74
75 /* ---------------------------------------------
76 * Zero out NOBITS sections. There are 2 of them:
77 * - the .bss section;
78 * - the coherent memory section.
79 * ---------------------------------------------
80 */
81 ldr r0, =__BSS_START__
82 ldr r1, =__BSS_SIZE__
83 bl zeromem
84
85#if USE_COHERENT_MEM
86 ldr r0, =__COHERENT_RAM_START__
87 ldr r1, =__COHERENT_RAM_UNALIGNED_SIZE__
88 bl zeromem
89#endif
90
91 /* --------------------------------------------
92 * Allocate a stack whose memory will be marked
93 * as Normal-IS-WBWA when the MMU is enabled.
94 * There is no risk of reading stale stack
95 * memory after enabling the MMU as only the
96 * primary cpu is running at the moment.
97 * --------------------------------------------
98 */
99 bl plat_set_my_stack
100
101 /* ---------------------------------------------
Douglas Raillard306593d2017-02-24 18:14:15 +0000102 * Initialize the stack protector canary before
103 * any C code is called.
104 * ---------------------------------------------
105 */
106#if STACK_PROTECTOR_ENABLED
107 bl update_stack_protector_canary
108#endif
109
110 /* ---------------------------------------------
Antonio Nino Diaz6e4b0832019-01-31 10:48:47 +0000111 * Perform BL2 setup
Yatharth Kochardafb2472016-06-30 14:52:12 +0100112 * ---------------------------------------------
113 */
Soby Mathew73308d02018-01-09 14:36:14 +0000114 mov r0, r9
115 mov r1, r10
116 mov r2, r11
117 mov r3, r12
Antonio Nino Diaz6e4b0832019-01-31 10:48:47 +0000118
119 bl bl2_setup
Yatharth Kochardafb2472016-06-30 14:52:12 +0100120
121 /* ---------------------------------------------
122 * Jump to main function.
123 * ---------------------------------------------
124 */
125 bl bl2_main
126
127 /* ---------------------------------------------
128 * Should never reach this point.
129 * ---------------------------------------------
130 */
Jeenu Viswambharan68aef102016-11-30 15:21:11 +0000131 no_ret plat_panic_handler
Yatharth Kochardafb2472016-06-30 14:52:12 +0100132
133endfunc bl2_entrypoint