blob: 064ed57a5b40f03d0d2f8357e7d5f752afc61810 [file] [log] [blame]
Dan Handley9df48042015-03-19 18:58:55 +00001#
Mikael Olsson7da66192021-02-12 17:30:22 +01002# Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005#
6
Chris Kaye9272152021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Soby Mathew0d268dc2016-07-11 14:13:56 +01009ifeq (${ARCH}, aarch64)
10 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
11 # DRAM (if available) or the TZC secured area of DRAM.
Dimitris Papastamos8a418592018-01-02 10:25:50 +000012 # TZC secured DRAM is the default.
Dan Handley9df48042015-03-19 18:58:55 +000013
Dimitris Papastamos8a418592018-01-02 10:25:50 +000014 ARM_TSP_RAM_LOCATION ?= dram
Qixiang Xuc7b12c52017-10-13 09:04:12 +080015
Soby Mathew0d268dc2016-07-11 14:13:56 +010016 ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
18 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
19 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
20 else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
21 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
22 else
23 $(error "Unsupported ARM_TSP_RAM_LOCATION value")
24 endif
Dan Handley9df48042015-03-19 18:58:55 +000025
Soby Mathew0d268dc2016-07-11 14:13:56 +010026 # Process flags
Soby Mathew0d268dc2016-07-11 14:13:56 +010027 # Process ARM_BL31_IN_DRAM flag
28 ARM_BL31_IN_DRAM := 0
29 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
30 $(eval $(call add_define,ARM_BL31_IN_DRAM))
Roberto Vargasac6dc352017-10-20 10:46:23 +010031else
32 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
Soby Mathew0d268dc2016-07-11 14:13:56 +010033endif
Dan Handley9df48042015-03-19 18:58:55 +000034
Roberto Vargasac6dc352017-10-20 10:46:23 +010035$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
36
37
Soby Mathew7799cf72015-04-16 14:49:09 +010038# For the original power-state parameter format, the State-ID can be encoded
39# according to the recommended encoding or zero. This flag determines which
40# State-ID encoding to be parsed.
41ARM_RECOM_STATE_ID_ENC := 0
42
Douglas Raillard66933ff2016-11-07 17:29:34 +000043# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
44# be set. Else throw a build error.
Soby Mathew7799cf72015-04-16 14:49:09 +010045ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
46 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
Douglas Raillard66933ff2016-11-07 17:29:34 +000047 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
48 PSCI_EXTENDED_STATE_ID is set for ARM platforms)
Soby Mathew7799cf72015-04-16 14:49:09 +010049 endif
50endif
51
52# Process ARM_RECOM_STATE_ID_ENC flag
53$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
54$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
55
Juan Castillob6132f12015-10-06 14:01:35 +010056# Process ARM_DISABLE_TRUSTED_WDOG flag
Zelalem Awekeaf7e3a42021-10-01 12:30:49 -050057# By default, Trusted Watchdog is always enabled unless
58# SPIN_ON_BL1_EXIT or ENABLE_RME is set
Juan Castillob6132f12015-10-06 14:01:35 +010059ARM_DISABLE_TRUSTED_WDOG := 0
Zelalem Awekeaf7e3a42021-10-01 12:30:49 -050060ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
Juan Castillob6132f12015-10-06 14:01:35 +010061ARM_DISABLE_TRUSTED_WDOG := 1
62endif
63$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
64$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
65
Juan Castilloaadf19a2015-11-06 16:02:32 +000066# Process ARM_CONFIG_CNTACR
67ARM_CONFIG_CNTACR := 1
68$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
69$(eval $(call add_define,ARM_CONFIG_CNTACR))
70
David Wang0ba499f2016-03-07 11:02:57 +080071# Process ARM_BL31_IN_DRAM flag
72ARM_BL31_IN_DRAM := 0
73$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
74$(eval $(call add_define,ARM_BL31_IN_DRAM))
75
Summer Qin93c812f2017-02-28 16:46:17 +000076# Process ARM_PLAT_MT flag
77ARM_PLAT_MT := 0
78$(eval $(call assert_boolean,ARM_PLAT_MT))
79$(eval $(call add_define,ARM_PLAT_MT))
80
Antonio Nino Diazf09d0032017-04-11 14:04:56 +010081# Use translation tables library v2 by default
82ARM_XLAT_TABLES_LIB_V1 := 0
83$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
84$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
85
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +010086# Don't have the Linux kernel as a BL33 image by default
87ARM_LINUX_KERNEL_AS_BL33 := 0
88$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
89$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
90
91ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
Andre Przywara6a3ac4e2021-02-08 17:40:48 +000092 ifneq (${ARCH},aarch64)
Manish Pandey37c4ec22018-11-02 13:28:25 +000093 ifneq (${RESET_TO_SP_MIN},1)
94 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
95 endif
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +010096 endif
97 ifndef PRELOADED_BL33_BASE
98 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
99 endif
Zelalem Aweke1e8e3fd2021-07-26 21:39:05 -0500100 ifeq (${RESET_TO_BL31},1)
101 ifndef ARM_PRELOADED_DTB_BASE
102 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is
103 used with RESET_TO_BL31.")
104 endif
105 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100106 endif
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100107endif
108
Mikael Olsson7da66192021-02-12 17:30:22 +0100109# Arm Ethos-N NPU SiP service
110ARM_ETHOSN_NPU_DRIVER := 0
111$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER))
112$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER))
113
Antonio Nino Diaz01b6cb92017-05-24 14:11:07 +0100114# Use an implementation of SHA-256 with a smaller memory footprint but reduced
115# speed.
116$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
117
Summer Qin80726782017-04-20 16:28:39 +0100118# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
119# in the FIP if the platform requires.
120ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900121$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Summer Qin80726782017-04-20 16:28:39 +0100122endif
123ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900124$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Summer Qin80726782017-04-20 16:28:39 +0100125endif
126
Soby Mathew421dbc42016-05-23 16:07:53 +0100127# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
Soby Mathew0d268dc2016-07-11 14:13:56 +0100128ENABLE_PSCI_STAT := 1
dp-arm66abfbe2017-01-31 13:01:04 +0000129ENABLE_PMF := 1
Soby Mathew421dbc42016-05-23 16:07:53 +0100130
Alexei Fedorov2381d2e2020-09-01 15:38:32 +0100131# Override the standard libc with optimised libc_asm
132OVERRIDE_LIBC := 1
133ifeq (${OVERRIDE_LIBC},1)
134 include lib/libc/libc_asm.mk
135endif
136
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100137# On ARM platforms, separate the code and read-only data sections to allow
138# mapping the former as executable and the latter as execute-never.
139SEPARATE_CODE_AND_RODATA := 1
140
Madhukar Pappireddyd7419442020-01-27 15:38:26 -0600141# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
142# and NOBITS sections of BL31 image are adjacent to each other and loaded
143# into Trusted SRAM.
144SEPARATE_NOBITS_REGION := 0
145
146# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
147# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
148# the build to require that ARM_BL31_IN_DRAM is enabled as well.
149ifeq ($(SEPARATE_NOBITS_REGION),1)
150 ifneq ($(ARM_BL31_IN_DRAM),1)
151 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
152 endif
153 ifneq ($(RECLAIM_INIT_CODE),0)
154 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
155 endif
156endif
157
Soby Mathew7e4d6652017-05-10 11:50:30 +0100158# Disable ARM Cryptocell by default
159ARM_CRYPTOCELL_INTEG := 0
160$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
161$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
162
Manish Pandey928da862021-06-10 15:22:48 +0100163# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
164ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
165 ENABLE_PIE := 1
Manish Pandey2207e932019-11-06 13:17:46 +0000166endif
167
Soby Mathewb9856482018-09-18 11:42:42 +0100168# CryptoCell integration relies on coherent buffers for passing data from
169# the AP CPU to the CryptoCell
170ifeq (${ARM_CRYPTOCELL_INTEG},1)
171 ifeq (${USE_COHERENT_MEM},0)
172 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.")
173 endif
174endif
175
Manish V Badarkhedd6f2522021-02-22 17:30:17 +0000176# Disable GPT parser support, use FIP image by default
177ARM_GPT_SUPPORT := 0
178$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
179$(eval $(call add_define,ARM_GPT_SUPPORT))
180
181# Include necessary sources to parse GPT image
182ifeq (${ARM_GPT_SUPPORT}, 1)
183 BL2_SOURCES += drivers/partition/gpt.c \
184 drivers/partition/partition.c
185endif
186
Manish V Badarkhe7a867922021-04-22 14:41:27 +0100187# Enable CRC instructions via extension for ARMv8-A CPUs.
188# For ARMv8.1-A, and onwards CRC instructions are default enabled.
189# Enable HW computed CRC support unconditionally in BL2 component.
190ifeq (${ARM_ARCH_MINOR},0)
191 BL2_CPPFLAGS += -march=armv8-a+crc
192endif
193
Manish V Badarkhed2f0a7a2021-06-25 23:43:33 +0100194ifeq ($(PSA_FWU_SUPPORT),1)
195 # GPT support is recommended as per PSA FWU specification hence
196 # PSA FWU implementation is tightly coupled with GPT support,
197 # and it does not support other formats.
198 ifneq ($(ARM_GPT_SUPPORT),1)
199 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
200 endif
201 FWU_MK := drivers/fwu/fwu.mk
202 $(info Including ${FWU_MK})
203 include ${FWU_MK}
204endif
205
Soby Mathew0d268dc2016-07-11 14:13:56 +0100206ifeq (${ARCH}, aarch64)
207PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
208endif
Dan Handley9df48042015-03-19 18:58:55 +0000209
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100210PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100211 plat/arm/common/arm_common.c \
212 plat/arm/common/arm_console.c
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100213
214ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
Gary Morrison3d7f6542021-01-27 13:08:47 -0600215PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100216 lib/xlat_tables/${ARCH}/xlat_tables.c
217else
Gary Morrison3d7f6542021-01-27 13:08:47 -0600218ifeq (${XLAT_MPU_LIB_V1}, 1)
219include lib/xlat_mpu/xlat_mpu.mk
220PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS}
221else
Antonio Nino Diaz719bf852017-02-23 17:22:58 +0000222include lib/xlat_tables_v2/xlat_tables.mk
Gary Morrison3d7f6542021-01-27 13:08:47 -0600223PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
224endif
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100225endif
Dan Handley9df48042015-03-19 18:58:55 +0000226
Louis Mayencourt6b232d92020-02-28 16:57:30 +0000227ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100228 plat/arm/common/fconf/arm_fconf_io.c
Olivier Deprez93df21f2020-01-23 11:24:33 +0100229ifeq (${SPD},spmd)
Balint Dobszay719ba9c2021-03-26 16:23:18 +0100230 ifeq (${BL2_ENABLE_SP_LOAD},1)
Olivier Deprez042db532020-03-19 09:27:11 +0100231 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
232 endif
Olivier Deprez93df21f2020-01-23 11:24:33 +0100233endif
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100234
Aditya Angadi20b48412019-04-16 11:29:14 +0530235BL1_SOURCES += drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000236 drivers/io/io_memmap.c \
237 drivers/io/io_storage.c \
238 plat/arm/common/arm_bl1_setup.c \
Soby Mathew94273572018-03-07 11:32:04 +0000239 plat/arm/common/arm_err.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100240 ${ARM_IO_SOURCES}
241
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000242ifdef EL3_PAYLOAD_BASE
Dimitris Papastamosd7a36512018-06-18 13:01:06 +0100243# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000244# their holding pen
245BL1_SOURCES += plat/arm/common/arm_pm.c
246endif
Dan Handley9df48042015-03-19 18:58:55 +0000247
Soby Mathew1ced6b82017-06-12 12:37:10 +0100248BL2_SOURCES += drivers/delay_timer/delay_timer.c \
249 drivers/delay_timer/generic_delay_timer.c \
250 drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000251 drivers/io/io_memmap.c \
252 drivers/io/io_storage.c \
253 plat/arm/common/arm_bl2_setup.c \
Soby Mathew94273572018-03-07 11:32:04 +0000254 plat/arm/common/arm_err.c \
Manish V Badarkhea26bf352021-07-02 20:29:56 +0100255 common/tf_crc32.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100256 ${ARM_IO_SOURCES}
Roberto Vargas52207802017-11-17 13:22:18 +0000257
Louis Mayencourt944ade82019-08-08 12:03:26 +0100258# Firmware Configuration Framework sources
259include lib/fconf/fconf.mk
Roberto Vargas52207802017-11-17 13:22:18 +0000260
Chris Kayb296ada2021-05-20 13:22:43 +0100261BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
262BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
263
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000264# Add `libfdt` and Arm common helpers required for Dynamic Config
265include lib/libfdt/libfdt.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100266
267DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000268 plat/arm/common/arm_dyn_cfg_helpers.c \
David Horstmannb2df4c12021-04-08 14:50:21 +0100269 common/uuid.c
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000270
Chris Kaye9272152021-09-28 15:52:14 +0100271DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES}
272
Soby Mathew45e39e22018-03-26 15:16:46 +0100273BL1_SOURCES += ${DYN_CFG_SOURCES}
274BL2_SOURCES += ${DYN_CFG_SOURCES}
275
Roberto Vargas52207802017-11-17 13:22:18 +0000276ifeq (${BL2_AT_EL3},1)
277BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
278endif
279
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000280# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
281# the AArch32 descriptors.
282ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
283BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
284else
Chandni Cherukuri0e6ddbc2021-12-11 14:16:17 +0530285ifneq (${PLAT}, diphda)
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000286BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
287endif
Abdellatif El Khlifiad9b8e52021-04-21 17:20:43 +0100288endif
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000289BL2_SOURCES += plat/arm/common/arm_image_load.c \
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100290 common/desc_image_load.c
Summer Qin9db8f2e2017-04-24 16:49:28 +0100291ifeq (${SPD},opteed)
292BL2_SOURCES += lib/optee/optee_utils.c
293endif
Dan Handley9df48042015-03-19 18:58:55 +0000294
Soby Mathew1ced6b82017-06-12 12:37:10 +0100295BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
296 drivers/delay_timer/generic_delay_timer.c \
297 plat/arm/common/arm_bl2u_setup.c
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100298
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000299BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
Dan Handley9df48042015-03-19 18:58:55 +0000300 plat/arm/common/arm_pm.c \
Dan Handley9df48042015-03-19 18:58:55 +0000301 plat/arm/common/arm_topology.c \
Soby Mathewf6c41082016-05-03 12:31:18 +0100302 plat/common/plat_psci_common.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100303
Mikael Olsson7da66192021-02-12 17:30:22 +0100304ifneq ($(filter 1,${ENABLE_PMF} ${ARM_ETHOSN_NPU_DRIVER}),)
305ARM_SVC_HANDLER_SRCS :=
306
307ifeq (${ENABLE_PMF},1)
308ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c
309endif
310
311ifeq (${ARM_ETHOSN_NPU_DRIVER},1)
312ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \
313 drivers/delay_timer/delay_timer.c \
314 drivers/arm/ethosn/ethosn_smc.c
315endif
316
Bence Szépkúti16362c62019-10-24 15:53:23 +0200317ifeq (${ARCH}, aarch64)
318BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\
319 plat/arm/common/arm_sip_svc.c \
Mikael Olsson7da66192021-02-12 17:30:22 +0100320 ${ARM_SVC_HANDLER_SRCS}
Bence Szépkúti78dc10c2019-11-07 12:09:24 +0100321else
322BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
Mikael Olsson7da66192021-02-12 17:30:22 +0100323 ${ARM_SVC_HANDLER_SRCS}
dp-arm1cebefd2016-09-19 11:21:03 +0100324endif
Bence Szépkúti16362c62019-10-24 15:53:23 +0200325endif
dp-arm1cebefd2016-09-19 11:21:03 +0100326
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100327ifeq (${EL3_EXCEPTION_HANDLING},1)
Sandeep Tripathy1c478392020-08-12 18:42:13 +0530328BL31_SOURCES += plat/common/aarch64/plat_ehf.c
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100329endif
330
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100331ifeq (${SDEI_SUPPORT},1)
332BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
Balint Dobszayd0dbd5e2019-12-18 15:28:00 +0100333ifeq (${SDEI_IN_FCONF},1)
334BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c
335endif
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100336endif
337
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000338# RAS sources
339ifeq (${RAS_EXTENSION},1)
340BL31_SOURCES += lib/extensions/ras/std_err_record.c \
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100341 lib/extensions/ras/ras_common.c
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000342endif
343
Antonio Nino Diaz9c852aa2019-01-31 11:01:10 +0000344# Pointer Authentication sources
345ifeq (${ENABLE_PAUTH}, 1)
Alexei Fedorovf41355c2019-09-13 14:11:59 +0100346PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \
347 lib/extensions/pauth/pauth_helpers.S
Antonio Nino Diaz9c852aa2019-01-31 11:01:10 +0000348endif
349
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100350ifeq (${SPD},spmd)
351BL31_SOURCES += plat/common/plat_spmd_manifest.c \
David Horstmannb2df4c12021-04-08 14:50:21 +0100352 common/uuid.c \
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100353 ${LIBFDT_SRCS}
354
Chris Kaye9272152021-09-28 15:52:14 +0100355BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100356endif
357
Juan Castilloa08a5e72015-05-19 11:54:12 +0100358ifneq (${TRUSTED_BOARD_BOOT},0)
359
Juan Castilloa08a5e72015-05-19 11:54:12 +0100360 # Include common TBB sources
361 AUTH_SOURCES := drivers/auth/auth_mod.c \
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000362 drivers/auth/crypto_mod.c \
363 drivers/auth/img_parser_mod.c \
Louis Mayencourt4da9b312019-09-30 10:57:24 +0100364 lib/fconf/fconf_tbbr_getter.c
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100365
366 # Include the selected chain of trust sources.
367 ifeq (${COT},tbbr)
laurenw-arm56f1e3e2021-03-03 14:19:38 -0600368 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
Manish V Badarkhe39317ab2020-07-23 10:43:57 +0100369 drivers/auth/tbbr/tbbr_cot_bl1.c
370 ifneq (${COT_DESC_IN_DTB},0)
371 BL2_SOURCES += lib/fconf/fconf_cot_getter.c
372 else
373 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
374 drivers/auth/tbbr/tbbr_cot_bl2.c
375 endif
Sandrine Bailleux012f8712020-02-06 14:59:33 +0100376 else ifeq (${COT},dualroot)
377 AUTH_SOURCES += drivers/auth/dualroot/cot.c
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100378 else
379 $(error Unknown chain of trust ${COT})
380 endif
Juan Castilloa08a5e72015-05-19 11:54:12 +0100381
Yatharth Kocharf11b29a2016-02-01 11:04:46 +0000382 BL1_SOURCES += ${AUTH_SOURCES} \
383 bl1/tbbr/tbbr_img_desc.c \
dp-armb3e85802016-12-12 14:48:13 +0000384 plat/arm/common/arm_bl1_fwu.c \
385 plat/common/tbbr/plat_tbbr.c
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100386
dp-armb3e85802016-12-12 14:48:13 +0000387 BL2_SOURCES += ${AUTH_SOURCES} \
Manish V Badarkhefe46f5f2020-05-27 09:39:42 +0100388 plat/common/tbbr/plat_tbbr.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100389
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900390 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
Yatharth Kochard1a93432015-10-12 12:33:47 +0100391
Manish V Badarkhee112a5a2021-10-06 23:41:50 +0100392# Include Measured Boot makefile before any Crypto library makefile.
393# Crypto library makefile may need default definitions of Measured Boot build
394# flags present in Measured Boot makefile.
395ifeq (${MEASURED_BOOT},1)
396 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
397 $(info Including ${MEASURED_BOOT_MK})
398 include ${MEASURED_BOOT_MK}
399endif
400
Juan Castilloa08a5e72015-05-19 11:54:12 +0100401 # We expect to locate the *.mk files under the directories specified below
Soby Mathew7e4d6652017-05-10 11:50:30 +0100402ifeq (${ARM_CRYPTOCELL_INTEG},0)
Juan Castilloa08a5e72015-05-19 11:54:12 +0100403 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
Soby Mathew7e4d6652017-05-10 11:50:30 +0100404else
405 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
406endif
Juan Castilloa08a5e72015-05-19 11:54:12 +0100407 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
408
409 $(info Including ${CRYPTO_LIB_MK})
410 include ${CRYPTO_LIB_MK}
411
412 $(info Including ${IMG_PARSER_LIB_MK})
413 include ${IMG_PARSER_LIB_MK}
414
415endif
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100416
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100417ifeq (${RECLAIM_INIT_CODE}, 1)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100418 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
419 $(error "To reclaim init code xlat tables v2 must be used")
420 endif
421endif
Alexei Fedorov71d81dc2020-07-13 13:58:06 +0100422