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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Antonio Nino Diaze3962d02017-02-16 16:17:19 +00002 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010034#include <bl_common.h>
35#include <bl31.h>
Antonio Nino Diaze3962d02017-02-16 16:17:19 +000036#include <console.h>
Achin Gupta7aea9082014-02-01 07:51:28 +000037#include <context_mgmt.h>
Soby Mathewafe7e2f2014-06-12 17:23:58 +010038#include <debug.h>
Dan Handley7ce42df2014-05-15 14:11:36 +010039#include <platform.h>
dp-arm3cac7862016-09-19 11:18:44 +010040#include <pmf.h>
41#include <runtime_instr.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010042#include <runtime_svc.h>
Vikram Kanigiri614f3952014-05-28 13:41:51 +010043#include <string.h>
Achin Gupta7aea9082014-02-01 07:51:28 +000044
dp-arm3cac7862016-09-19 11:18:44 +010045#if ENABLE_RUNTIME_INSTRUMENTATION
46PMF_REGISTER_SERVICE_SMC(rt_instr_svc, PMF_RT_INSTR_SVC_ID,
47 RT_INSTR_TOTAL_IDS, PMF_STORE_ENABLE)
48#endif
49
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000050/*******************************************************************************
51 * This function pointer is used to initialise the BL32 image. It's initialized
52 * by SPD calling bl31_register_bl32_init after setting up all things necessary
53 * for SP execution. In cases where both SPD and SP are absent, or when SPD
54 * finds it impossible to execute SP, this pointer is left as NULL
55 ******************************************************************************/
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010056static int32_t (*bl32_init)(void);
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000057
Achin Gupta7aea9082014-02-01 07:51:28 +000058/*******************************************************************************
Achin Gupta35ca3512014-02-19 17:58:33 +000059 * Variable to indicate whether next image to execute after BL31 is BL33
60 * (non-secure & default) or BL32 (secure).
61 ******************************************************************************/
Vikram Kanigiri4e813412014-07-15 16:49:22 +010062static uint32_t next_image_type = NON_SECURE;
Achin Gupta35ca3512014-02-19 17:58:33 +000063
Soby Mathew8da89662016-09-19 17:21:15 +010064/*
65 * Implement the ARM Standard Service function to get arguments for a
66 * particular service.
67 */
68uintptr_t get_arm_std_svc_args(unsigned int svc_mask)
69{
70 /* Setup the arguments for PSCI Library */
71 DEFINE_STATIC_PSCI_LIB_ARGS_V1(psci_args, bl31_warm_entrypoint);
72
73 /* PSCI is the only ARM Standard Service implemented */
74 assert(svc_mask == PSCI_FID_MASK);
75
76 return (uintptr_t)&psci_args;
77}
78
Achin Gupta35ca3512014-02-19 17:58:33 +000079/*******************************************************************************
Achin Gupta7aea9082014-02-01 07:51:28 +000080 * Simple function to initialise all BL31 helper libraries.
81 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +010082void bl31_lib_init(void)
Achin Gupta7aea9082014-02-01 07:51:28 +000083{
84 cm_init();
85}
Achin Gupta4f6ad662013-10-25 09:08:21 +010086
Achin Gupta4f6ad662013-10-25 09:08:21 +010087/*******************************************************************************
88 * BL31 is responsible for setting up the runtime services for the primary cpu
Achin Gupta35ca3512014-02-19 17:58:33 +000089 * before passing control to the bootloader or an Operating System. This
90 * function calls runtime_svc_init() which initializes all registered runtime
91 * services. The run time services would setup enough context for the core to
92 * swtich to the next exception level. When this function returns, the core will
93 * switch to the programmed exception level via. an ERET.
Achin Gupta4f6ad662013-10-25 09:08:21 +010094 ******************************************************************************/
95void bl31_main(void)
96{
Juan Castillo7d199412015-12-14 09:35:25 +000097 NOTICE("BL31: %s\n", version_string);
98 NOTICE("BL31: %s\n", build_message);
Dan Handley91b624e2014-07-29 17:14:00 +010099
Soby Mathew1ff495b2015-12-09 11:28:43 +0000100 /* Perform platform setup in BL31 */
Achin Gupta4f6ad662013-10-25 09:08:21 +0100101 bl31_platform_setup();
102
Achin Gupta7aea9082014-02-01 07:51:28 +0000103 /* Initialise helper libraries */
104 bl31_lib_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100105
Soby Mathew8da89662016-09-19 17:21:15 +0100106 /* Initialize the runtime services e.g. psci. */
Juan Castillo7d199412015-12-14 09:35:25 +0000107 INFO("BL31: Initializing runtime services\n");
Achin Gupta7421b462014-02-01 18:53:26 +0000108 runtime_svc_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100109
Achin Gupta35ca3512014-02-19 17:58:33 +0000110 /*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000111 * All the cold boot actions on the primary cpu are done. We now need to
112 * decide which is the next image (BL32 or BL33) and how to execute it.
113 * If the SPD runtime service is present, it would want to pass control
114 * to BL32 first in S-EL1. In that case, SPD would have registered a
115 * function to intialize bl32 where it takes responsibility of entering
116 * S-EL1 and returning control back to bl31_main. Once this is done we
117 * can prepare entry into BL33 as normal.
Achin Gupta35ca3512014-02-19 17:58:33 +0000118 */
119
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000120 /*
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100121 * If SPD had registerd an init hook, invoke it.
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000122 */
Dan Handley91b624e2014-07-29 17:14:00 +0100123 if (bl32_init) {
Juan Castillo7d199412015-12-14 09:35:25 +0000124 INFO("BL31: Initializing BL32\n");
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100125 (*bl32_init)();
Dan Handley91b624e2014-07-29 17:14:00 +0100126 }
Achin Gupta35ca3512014-02-19 17:58:33 +0000127 /*
128 * We are ready to enter the next EL. Prepare entry into the image
129 * corresponding to the desired security state after the next ERET.
130 */
131 bl31_prepare_next_image_entry();
Soby Mathew1ff495b2015-12-09 11:28:43 +0000132
Antonio Nino Diaze3962d02017-02-16 16:17:19 +0000133 console_flush();
134
Soby Mathew1ff495b2015-12-09 11:28:43 +0000135 /*
136 * Perform any platform specific runtime setup prior to cold boot exit
137 * from BL31
138 */
139 bl31_plat_runtime_setup();
Achin Gupta35ca3512014-02-19 17:58:33 +0000140}
141
142/*******************************************************************************
143 * Accessor functions to help runtime services decide which image should be
144 * executed after BL31. This is BL33 or the non-secure bootloader image by
145 * default but the Secure payload dispatcher could override this by requesting
146 * an entry into BL32 (Secure payload) first. If it does so then it should use
147 * the same API to program an entry into BL33 once BL32 initialisation is
148 * complete.
149 ******************************************************************************/
150void bl31_set_next_image_type(uint32_t security_state)
151{
Juan Castillof558cac2014-06-05 09:45:36 +0100152 assert(sec_state_is_valid(security_state));
Achin Gupta35ca3512014-02-19 17:58:33 +0000153 next_image_type = security_state;
154}
155
156uint32_t bl31_get_next_image_type(void)
157{
158 return next_image_type;
159}
160
161/*******************************************************************************
162 * This function programs EL3 registers and performs other setup to enable entry
163 * into the next image after BL31 at the next ERET.
164 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +0100165void bl31_prepare_next_image_entry(void)
Achin Gupta35ca3512014-02-19 17:58:33 +0000166{
Vikram Kanigirida567432014-04-15 18:08:08 +0100167 entry_point_info_t *next_image_info;
Andrew Thoelke4e126072014-06-04 21:10:52 +0100168 uint32_t image_type;
Achin Gupta35ca3512014-02-19 17:58:33 +0000169
Soby Mathewd75d2ba2016-05-17 14:01:32 +0100170#if CTX_INCLUDE_AARCH32_REGS
171 /*
172 * Ensure that the build flag to save AArch32 system registers in CPU
173 * context is not set for AArch64-only platforms.
174 */
175 if (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL1_SHIFT)
176 & ID_AA64PFR0_ELX_MASK) == 0x1) {
177 ERROR("EL1 supports AArch64-only. Please set build flag "
178 "CTX_INCLUDE_AARCH32_REGS = 0");
179 panic();
180 }
181#endif
182
Achin Gupta35ca3512014-02-19 17:58:33 +0000183 /* Determine which image to execute next */
184 image_type = bl31_get_next_image_type();
185
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000186 /* Program EL3 registers to enable entry into the next EL */
Dan Handley701fea72014-05-27 16:17:21 +0100187 next_image_info = bl31_plat_get_next_image_ep_info(image_type);
Achin Gupta35ca3512014-02-19 17:58:33 +0000188 assert(next_image_info);
Vikram Kanigiri614f3952014-05-28 13:41:51 +0100189 assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr));
Achin Gupta35ca3512014-02-19 17:58:33 +0000190
Juan Castillo7d199412015-12-14 09:35:25 +0000191 INFO("BL31: Preparing for EL3 exit to %s world\n",
Dan Handley91b624e2014-07-29 17:14:00 +0100192 (image_type == SECURE) ? "secure" : "normal");
Sandrine Bailleuxb2e224c2015-09-28 17:03:06 +0100193 print_entry_point_info(next_image_info);
Soby Mathew3700a922015-07-13 11:21:11 +0100194 cm_init_my_context(next_image_info);
Andrew Thoelke4e126072014-06-04 21:10:52 +0100195 cm_prepare_el3_exit(image_type);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100196}
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000197
198/*******************************************************************************
199 * This function initializes the pointer to BL32 init function. This is expected
200 * to be called by the SPD after it finishes all its initialization
201 ******************************************************************************/
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100202void bl31_register_bl32_init(int32_t (*func)(void))
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000203{
204 bl32_init = func;
205}