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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handley0cdebbd2015-03-30 17:15:16 +01002 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __ARCH_HELPERS_H__
32#define __ARCH_HELPERS_H__
33
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010034#include <arch.h> /* for additional register definitions */
35#include <cdefs.h> /* For __dead2 */
36#include <stdint.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010037
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010038/**********************************************************************
39 * Macros which create inline functions to read or write CPU system
40 * registers
41 *********************************************************************/
42
Sandrine Bailleux30c231b2015-01-07 16:36:11 +000043#define _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \
44static inline uint64_t read_ ## _name(void) \
45{ \
46 uint64_t v; \
47 __asm__ volatile ("mrs %0, " #_reg_name : "=r" (v)); \
48 return v; \
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010049}
50
Sandrine Bailleux30c231b2015-01-07 16:36:11 +000051#define _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name) \
52static inline void write_ ## _name(uint64_t v) \
53{ \
54 __asm__ volatile ("msr " #_reg_name ", %0" : : "r" (v)); \
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010055}
56
57#define _DEFINE_SYSREG_WRITE_CONST_FUNC(_name, _reg_name) \
Sandrine Bailleux30c231b2015-01-07 16:36:11 +000058static inline void write_ ## _name(const uint64_t v) \
59{ \
60 __asm__ volatile ("msr " #_reg_name ", %0" : : "i" (v)); \
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010061}
62
63/* Define read function for system register */
64#define DEFINE_SYSREG_READ_FUNC(_name) \
65 _DEFINE_SYSREG_READ_FUNC(_name, _name)
66
67/* Define read & write function for system register */
68#define DEFINE_SYSREG_RW_FUNCS(_name) \
69 _DEFINE_SYSREG_READ_FUNC(_name, _name) \
70 _DEFINE_SYSREG_WRITE_FUNC(_name, _name)
71
72/* Define read & write function for renamed system register */
73#define DEFINE_RENAME_SYSREG_RW_FUNCS(_name, _reg_name) \
74 _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \
75 _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name)
76
77/* Define write function for special system registers */
78#define DEFINE_SYSREG_WRITE_CONST_FUNC(_name) \
79 _DEFINE_SYSREG_WRITE_CONST_FUNC(_name, _name)
80
81
82/**********************************************************************
83 * Macros to create inline functions for system instructions
84 *********************************************************************/
85
86/* Define function for simple system instruction */
87#define DEFINE_SYSOP_FUNC(_op) \
Juan Castillo2d552402014-06-13 17:05:10 +010088static inline void _op(void) \
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010089{ \
90 __asm__ (#_op); \
91}
92
93/* Define function for system instruction with type specifier */
94#define DEFINE_SYSOP_TYPE_FUNC(_op, _type) \
Juan Castillo2d552402014-06-13 17:05:10 +010095static inline void _op ## _type(void) \
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010096{ \
97 __asm__ (#_op " " #_type); \
98}
99
100/* Define function for system instruction with register parameter */
101#define DEFINE_SYSOP_TYPE_PARAM_FUNC(_op, _type) \
102static inline void _op ## _type(uint64_t v) \
103{ \
104 __asm__ (#_op " " #_type ", %0" : : "r" (v)); \
105}
Achin Gupta4f6ad662013-10-25 09:08:21 +0100106
107/*******************************************************************************
Achin Guptaa0cd9892014-02-09 13:30:38 +0000108 * Aarch64 translation tables manipulation helper prototypes
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100109******************************************************************************/
110uint64_t create_table_desc(uint64_t *next_table_ptr);
111uint64_t create_block_desc(uint64_t desc, uint64_t addr, uint32_t level);
112uint64_t create_device_block(uint64_t output_addr, uint32_t level, uint32_t ns);
113uint64_t create_romem_block(uint64_t output_addr, uint32_t level, uint32_t ns);
114uint64_t create_rwmem_block(uint64_t output_addr, uint32_t level, uint32_t ns);
Achin Guptaa0cd9892014-02-09 13:30:38 +0000115
116/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100117 * TLB maintenance accessor prototypes
118 ******************************************************************************/
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100119DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1)
120DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is)
121DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2)
122DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is)
123DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3)
124DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3is)
125DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100126
127/*******************************************************************************
128 * Cache maintenance accessor prototypes
129 ******************************************************************************/
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100130DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, isw)
131DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cisw)
132DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, csw)
133DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvac)
134DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, ivac)
135DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, civac)
136DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvau)
137DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, zva)
138
Varun Wadekar97625e32015-03-13 14:59:03 +0530139/*******************************************************************************
140 * Address translation accessor prototypes
141 ******************************************************************************/
142DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1r)
143DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1w)
144DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0r)
145DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0w)
146
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100147void flush_dcache_range(uint64_t, uint64_t);
148void inv_dcache_range(uint64_t, uint64_t);
149void dcsw_op_louis(uint32_t);
150void dcsw_op_all(uint32_t);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100151
Dan Handleya17fefa2014-05-14 12:38:32 +0100152void disable_mmu_el3(void);
153void disable_mmu_icache_el3(void);
Andrew Thoelke438c63a2014-04-28 12:06:18 +0100154
Achin Gupta4f6ad662013-10-25 09:08:21 +0100155/*******************************************************************************
156 * Misc. accessor prototypes
157 ******************************************************************************/
Achin Gupta4f6ad662013-10-25 09:08:21 +0100158
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100159DEFINE_SYSREG_WRITE_CONST_FUNC(daifset)
160DEFINE_SYSREG_WRITE_CONST_FUNC(daifclr)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100161
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100162#define enable_irq() write_daifclr(DAIF_IRQ_BIT)
163#define enable_fiq() write_daifclr(DAIF_FIQ_BIT)
164#define enable_serror() write_daifclr(DAIF_ABT_BIT)
165#define enable_debug_exceptions() write_daifclr(DAIF_DBG_BIT)
166#define disable_irq() write_daifset(DAIF_IRQ_BIT)
167#define disable_fiq() write_daifset(DAIF_FIQ_BIT)
168#define disable_serror() write_daifset(DAIF_ABT_BIT)
169#define disable_debug_exceptions() write_daifset(DAIF_DBG_BIT)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100170
Varun Wadekar97625e32015-03-13 14:59:03 +0530171DEFINE_SYSREG_READ_FUNC(par_el1)
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100172DEFINE_SYSREG_READ_FUNC(id_pfr1_el1)
173DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1)
174DEFINE_SYSREG_READ_FUNC(CurrentEl)
175DEFINE_SYSREG_RW_FUNCS(daif)
176DEFINE_SYSREG_RW_FUNCS(spsr_el1)
177DEFINE_SYSREG_RW_FUNCS(spsr_el2)
178DEFINE_SYSREG_RW_FUNCS(spsr_el3)
179DEFINE_SYSREG_RW_FUNCS(elr_el1)
180DEFINE_SYSREG_RW_FUNCS(elr_el2)
181DEFINE_SYSREG_RW_FUNCS(elr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100182
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100183DEFINE_SYSOP_FUNC(wfi)
184DEFINE_SYSOP_FUNC(wfe)
185DEFINE_SYSOP_FUNC(sev)
186DEFINE_SYSOP_TYPE_FUNC(dsb, sy)
Soby Mathewed995662014-12-30 16:11:42 +0000187DEFINE_SYSOP_TYPE_FUNC(dmb, sy)
188DEFINE_SYSOP_TYPE_FUNC(dsb, ish)
189DEFINE_SYSOP_TYPE_FUNC(dmb, ish)
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100190DEFINE_SYSOP_FUNC(isb)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100191
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100192uint32_t get_afflvl_shift(uint32_t);
193uint32_t mpidr_mask_lower_afflvls(uint64_t, uint32_t);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100194
Achin Gupta4f6ad662013-10-25 09:08:21 +0100195
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100196void __dead2 eret(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3,
197 uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7);
198void __dead2 smc(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3,
199 uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100200
201/*******************************************************************************
202 * System register accessor prototypes
203 ******************************************************************************/
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100204DEFINE_SYSREG_READ_FUNC(midr_el1)
205DEFINE_SYSREG_READ_FUNC(mpidr_el1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100206
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100207DEFINE_SYSREG_RW_FUNCS(scr_el3)
208DEFINE_SYSREG_RW_FUNCS(hcr_el2)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100209
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100210DEFINE_SYSREG_RW_FUNCS(vbar_el1)
211DEFINE_SYSREG_RW_FUNCS(vbar_el2)
212DEFINE_SYSREG_RW_FUNCS(vbar_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100213
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100214DEFINE_SYSREG_RW_FUNCS(sctlr_el1)
215DEFINE_SYSREG_RW_FUNCS(sctlr_el2)
216DEFINE_SYSREG_RW_FUNCS(sctlr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100217
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100218DEFINE_SYSREG_RW_FUNCS(actlr_el1)
219DEFINE_SYSREG_RW_FUNCS(actlr_el2)
220DEFINE_SYSREG_RW_FUNCS(actlr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100221
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100222DEFINE_SYSREG_RW_FUNCS(esr_el1)
223DEFINE_SYSREG_RW_FUNCS(esr_el2)
224DEFINE_SYSREG_RW_FUNCS(esr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100225
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100226DEFINE_SYSREG_RW_FUNCS(afsr0_el1)
227DEFINE_SYSREG_RW_FUNCS(afsr0_el2)
228DEFINE_SYSREG_RW_FUNCS(afsr0_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100229
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100230DEFINE_SYSREG_RW_FUNCS(afsr1_el1)
231DEFINE_SYSREG_RW_FUNCS(afsr1_el2)
232DEFINE_SYSREG_RW_FUNCS(afsr1_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100233
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100234DEFINE_SYSREG_RW_FUNCS(far_el1)
235DEFINE_SYSREG_RW_FUNCS(far_el2)
236DEFINE_SYSREG_RW_FUNCS(far_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100237
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100238DEFINE_SYSREG_RW_FUNCS(mair_el1)
239DEFINE_SYSREG_RW_FUNCS(mair_el2)
240DEFINE_SYSREG_RW_FUNCS(mair_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100241
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100242DEFINE_SYSREG_RW_FUNCS(amair_el1)
243DEFINE_SYSREG_RW_FUNCS(amair_el2)
244DEFINE_SYSREG_RW_FUNCS(amair_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100245
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100246DEFINE_SYSREG_READ_FUNC(rvbar_el1)
247DEFINE_SYSREG_READ_FUNC(rvbar_el2)
248DEFINE_SYSREG_READ_FUNC(rvbar_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100249
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100250DEFINE_SYSREG_RW_FUNCS(rmr_el1)
251DEFINE_SYSREG_RW_FUNCS(rmr_el2)
252DEFINE_SYSREG_RW_FUNCS(rmr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100253
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100254DEFINE_SYSREG_RW_FUNCS(tcr_el1)
255DEFINE_SYSREG_RW_FUNCS(tcr_el2)
256DEFINE_SYSREG_RW_FUNCS(tcr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100257
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100258DEFINE_SYSREG_RW_FUNCS(ttbr0_el1)
259DEFINE_SYSREG_RW_FUNCS(ttbr0_el2)
260DEFINE_SYSREG_RW_FUNCS(ttbr0_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100261
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100262DEFINE_SYSREG_RW_FUNCS(ttbr1_el1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100263
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100264DEFINE_SYSREG_RW_FUNCS(cptr_el2)
265DEFINE_SYSREG_RW_FUNCS(cptr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100266
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100267DEFINE_SYSREG_RW_FUNCS(cpacr_el1)
268DEFINE_SYSREG_RW_FUNCS(cntfrq_el0)
269DEFINE_SYSREG_RW_FUNCS(cntps_ctl_el1)
270DEFINE_SYSREG_RW_FUNCS(cntps_tval_el1)
271DEFINE_SYSREG_RW_FUNCS(cntps_cval_el1)
272DEFINE_SYSREG_READ_FUNC(cntpct_el0)
273DEFINE_SYSREG_RW_FUNCS(cnthctl_el2)
Soby Mathew5e5c2072014-04-07 15:28:55 +0100274
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100275DEFINE_SYSREG_RW_FUNCS(tpidr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100276
Soby Mathewfeddfcf2014-08-29 14:41:58 +0100277DEFINE_SYSREG_RW_FUNCS(cntvoff_el2)
278
Andrew Thoelke4e126072014-06-04 21:10:52 +0100279DEFINE_SYSREG_RW_FUNCS(vpidr_el2)
280DEFINE_SYSREG_RW_FUNCS(vmpidr_el2)
281
Soby Mathew26fb90e2015-01-06 21:36:55 +0000282DEFINE_SYSREG_READ_FUNC(isr_el1)
283
Dan Handley0cdebbd2015-03-30 17:15:16 +0100284DEFINE_SYSREG_READ_FUNC(ctr_el0)
285
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100286/* GICv3 System Registers */
Achin Gupta4f6ad662013-10-25 09:08:21 +0100287
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100288DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el1, ICC_SRE_EL1)
289DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el2, ICC_SRE_EL2)
290DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el3, ICC_SRE_EL3)
291DEFINE_RENAME_SYSREG_RW_FUNCS(icc_pmr_el1, ICC_PMR_EL1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100292
Achin Gupta4f6ad662013-10-25 09:08:21 +0100293
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100294#define IS_IN_EL(x) \
295 (GET_EL(read_CurrentEl()) == MODE_EL##x)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100296
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100297#define IS_IN_EL1() IS_IN_EL(1)
298#define IS_IN_EL3() IS_IN_EL(3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100299
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100300/* Previously defined accesor functions with incomplete register names */
Achin Gupta4f6ad662013-10-25 09:08:21 +0100301
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100302#define read_current_el() read_CurrentEl()
Achin Gupta4f6ad662013-10-25 09:08:21 +0100303
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100304#define dsb() dsbsy()
Achin Gupta4f6ad662013-10-25 09:08:21 +0100305
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100306#define read_midr() read_midr_el1()
Achin Gupta4f6ad662013-10-25 09:08:21 +0100307
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100308#define read_mpidr() read_mpidr_el1()
Achin Gupta4f6ad662013-10-25 09:08:21 +0100309
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100310#define read_scr() read_scr_el3()
311#define write_scr(_v) write_scr_el3(_v)
Soby Mathew5e5c2072014-04-07 15:28:55 +0100312
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100313#define read_hcr() read_hcr_el2()
314#define write_hcr(_v) write_hcr_el2(_v)
Sandrine Bailleux25232af2014-05-09 11:23:11 +0100315
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100316#define read_cpacr() read_cpacr_el1()
317#define write_cpacr(_v) write_cpacr_el1(_v)
Soby Mathew5e5c2072014-04-07 15:28:55 +0100318
Achin Gupta4f6ad662013-10-25 09:08:21 +0100319#endif /* __ARCH_HELPERS_H__ */