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Tony Xief6118cc2016-01-15 17:17:32 +08001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Tony Xief6118cc2016-01-15 17:17:32 +08005 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <platform_def.h>
Tony Xief6118cc2016-01-15 17:17:32 +080010
Lin Huang30e43392017-05-04 16:02:45 +080011 .globl pmu_cpuson_entrypoint
12 .macro pmusram_entry_func _name
13 .section .pmusram.entry, "ax"
14 .type \_name, %function
Lin Huang30e43392017-05-04 16:02:45 +080015 .cfi_startproc
16 \_name:
17 .endm
Tony Xief6118cc2016-01-15 17:17:32 +080018
Lin Huang30e43392017-05-04 16:02:45 +080019pmusram_entry_func pmu_cpuson_entrypoint
20
Lin Huang2a6df222017-05-12 10:26:32 +080021#if PSRAM_CHECK_WAKEUP_CPU
22check_wake_cpus:
23 mrs x0, MPIDR_EL1
24 and x1, x0, #MPIDR_CPU_MASK
25 and x0, x0, #MPIDR_CLUSTER_MASK
26 orr x0, x0, x1
27
28 /* primary_cpu */
29 ldr w1, boot_mpidr
30 cmp w0, w1
31 b.eq sys_wakeup
32
33 /*
34 * If the core is not the primary cpu,
35 * force the core into wfe.
36 */
37wfe_loop:
38 wfe
39 b wfe_loop
40sys_wakeup:
41#endif
42
Lin Huang30e43392017-05-04 16:02:45 +080043#if PSRAM_DO_DDR_RESUME
Tony Xief6118cc2016-01-15 17:17:32 +080044ddr_resume:
Lin Huang30e43392017-05-04 16:02:45 +080045 ldr x2, =__bl31_sram_stack_end
46 mov sp, x2
Lin Huang1f8fdeb2017-05-17 16:14:37 +080047 bl dmc_resume
Lin Huang30e43392017-05-04 16:02:45 +080048#endif
Lin Huang88dd1232017-05-16 16:40:46 +080049 bl sram_restore
Lin Huang30e43392017-05-04 16:02:45 +080050sys_resume:
Antonio Nino Diaz58230902018-09-24 17:16:20 +010051 bl bl31_warm_entrypoint
Tony Xief6118cc2016-01-15 17:17:32 +080052endfunc pmu_cpuson_entrypoint