rockchip: add pmusram section
the function pmu_cpuon_entrypoint() need to run in the pmusram,
we just copy bin file to pmusram before, now we add pmusram section
and link pmu_cpuon_entrypoint() to pmusram directly
Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
diff --git a/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S b/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S
index 8f175c3..64261ac 100644
--- a/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S
+++ b/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S
@@ -7,50 +7,25 @@
#include <arch.h>
#include <asm_macros.S>
#include <platform_def.h>
-#include <pmu_sram.h>
- .globl pmu_cpuson_entrypoint_start
- .globl pmu_cpuson_entrypoint_end
+ .globl pmu_cpuson_entrypoint
+ .macro pmusram_entry_func _name
+ .section .pmusram.entry, "ax"
+ .type \_name, %function
+ .func \_name
+ .cfi_startproc
+ \_name:
+ .endm
-func pmu_cpuson_entrypoint
-pmu_cpuson_entrypoint_start:
- ldr x5, psram_data
-check_wake_cpus:
- mrs x0, MPIDR_EL1
- and x1, x0, #MPIDR_CPU_MASK
- and x0, x0, #MPIDR_CLUSTER_MASK
- orr x0, x0, x1
- /* primary_cpu */
- ldr w1, [x5, #PSRAM_DT_MPIDR]
- cmp w0, w1
- b.eq sys_wakeup
- /*
- * If the core is not the primary cpu,
- * force the core into wfe.
- */
-wfe_loop:
- wfe
- b wfe_loop
-sys_wakeup:
- /* check ddr flag for resume ddr */
- ldr w2, [x5, #PSRAM_DT_DDRFLAG]
- cmp w2, #0x0
- b.eq sys_resume
+pmusram_entry_func pmu_cpuson_entrypoint
+
+#if PSRAM_DO_DDR_RESUME
ddr_resume:
- ldr x2, [x5, #PSRAM_DT_SP]
- mov sp, x2
- ldr x1, [x5, #PSRAM_DT_DDR_FUNC]
- ldr x0, [x5, #PSRAM_DT_DDR_DATA]
- blr x1
-sys_resume:
- ldr x1, sys_wakeup_entry
- br x1
+ ldr x2, =__bl31_sram_stack_end
+ mov sp, x2
+ bl dmc_restore
+#endif
- .align 3
-psram_data:
- .quad PSRAM_DT_BASE
-sys_wakeup_entry:
- .quad psci_entrypoint
-pmu_cpuson_entrypoint_end:
- .word 0
+sys_resume:
+ bl psci_entrypoint
endfunc pmu_cpuson_entrypoint