rockchip: add pmusram section
the function pmu_cpuon_entrypoint() need to run in the pmusram,
we just copy bin file to pmusram before, now we add pmusram section
and link pmu_cpuon_entrypoint() to pmusram directly
Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
diff --git a/plat/rockchip/common/pmusram/pmu_sram.c b/plat/rockchip/common/pmusram/pmu_sram.c
deleted file mode 100644
index 05ee762..0000000
--- a/plat/rockchip/common/pmusram/pmu_sram.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <console.h>
-#include <debug.h>
-#include <platform.h>
-#include <plat_private.h>
-
-/*****************************************************************************
- * sram only surpport 32-bits access
- ******************************************************************************/
-void u32_align_cpy(uint32_t *dst, const uint32_t *src, size_t bytes)
-{
- uint32_t i;
-
- for (i = 0; i < bytes; i++)
- dst[i] = src[i];
-}
-
-void rockchip_plat_sram_mmu_el3(void)
-{
-#ifdef PLAT_EXTRA_LD_SCRIPT
- size_t sram_size;
-
- /* sram.text size */
- sram_size = (char *)&__bl31_sram_text_end -
- (char *)&__bl31_sram_text_start;
- mmap_add_region((unsigned long)&__bl31_sram_text_start,
- (unsigned long)&__bl31_sram_text_start,
- sram_size, MT_MEMORY | MT_RO | MT_SECURE);
-
- /* sram.data size */
- sram_size = (char *)&__bl31_sram_data_end -
- (char *)&__bl31_sram_data_start;
- mmap_add_region((unsigned long)&__bl31_sram_data_start,
- (unsigned long)&__bl31_sram_data_start,
- sram_size, MT_MEMORY | MT_RW | MT_SECURE);
-
- /* sram.incbin size */
- sram_size = (char *)&__sram_incbin_end - (char *)&__sram_incbin_start;
- mmap_add_region((unsigned long)&__sram_incbin_start,
- (unsigned long)&__sram_incbin_start,
- sram_size, MT_NON_CACHEABLE | MT_RW | MT_SECURE);
-#else
- /* TODO: Support other SoCs, Just support RK3399 now */
- return;
-#endif
-}
-
-void plat_rockchip_mem_prepare(void)
-{
- /* The code for resuming cpu from suspend must be excuted in pmusram */
- plat_rockchip_pmusram_prepare();
-}
diff --git a/plat/rockchip/common/pmusram/pmu_sram.h b/plat/rockchip/common/pmusram/pmu_sram.h
deleted file mode 100644
index 24a1c25..0000000
--- a/plat/rockchip/common/pmusram/pmu_sram.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef __PMU_SRAM_H__
-#define __PMU_SRAM_H__
-
-/*****************************************************************************
- * define data offset in struct psram_data
- *****************************************************************************/
-#define PSRAM_DT_SP 0x0
-#define PSRAM_DT_DDR_FUNC 0x8
-#define PSRAM_DT_DDR_DATA 0x10
-#define PSRAM_DT_DDRFLAG 0x18
-#define PSRAM_DT_MPIDR 0x1c
-#define PSRAM_DT_END 0x20
-/******************************************************************************
- * Allocate data region for struct psram_data_t in pmusram
- ******************************************************************************/
-/* Needed aligned 16 bytes for sp stack top */
-#define PSRAM_DT_SIZE (((PSRAM_DT_END + 16) / 16) * 16)
-#define PSRAM_DT_BASE ((PMUSRAM_BASE + PMUSRAM_RSIZE) - PSRAM_DT_SIZE)
-#define PSRAM_SP_TOP PSRAM_DT_BASE
-
-#ifndef __ASSEMBLY__
-
-struct psram_data_t {
- uint64_t sp;
- uint64_t ddr_func;
- uint64_t ddr_data;
- uint32_t ddr_flag;
- uint32_t boot_mpidr;
-};
-
-CASSERT(sizeof(struct psram_data_t) <= PSRAM_DT_SIZE,
- assert_psram_dt_size_mismatch);
-CASSERT(__builtin_offsetof(struct psram_data_t, sp) == PSRAM_DT_SP,
- assert_psram_dt_sp_offset_mistmatch);
-CASSERT(__builtin_offsetof(struct psram_data_t, ddr_func) == PSRAM_DT_DDR_FUNC,
- assert_psram_dt_ddr_func_offset_mistmatch);
-CASSERT(__builtin_offsetof(struct psram_data_t, ddr_data) == PSRAM_DT_DDR_DATA,
- assert_psram_dt_ddr_data_offset_mistmatch);
-CASSERT(__builtin_offsetof(struct psram_data_t, ddr_flag) == PSRAM_DT_DDRFLAG,
- assert_psram_dt_ddr_flag_offset_mistmatch);
-CASSERT(__builtin_offsetof(struct psram_data_t, boot_mpidr) == PSRAM_DT_MPIDR,
- assert_psram_dt_mpidr_offset_mistmatch);
-void u32_align_cpy(uint32_t *dst, const uint32_t *src, size_t bytes);
-
-#endif /* __ASSEMBLY__ */
-
-#endif
diff --git a/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S b/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S
index 8f175c3..64261ac 100644
--- a/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S
+++ b/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S
@@ -7,50 +7,25 @@
#include <arch.h>
#include <asm_macros.S>
#include <platform_def.h>
-#include <pmu_sram.h>
- .globl pmu_cpuson_entrypoint_start
- .globl pmu_cpuson_entrypoint_end
+ .globl pmu_cpuson_entrypoint
+ .macro pmusram_entry_func _name
+ .section .pmusram.entry, "ax"
+ .type \_name, %function
+ .func \_name
+ .cfi_startproc
+ \_name:
+ .endm
-func pmu_cpuson_entrypoint
-pmu_cpuson_entrypoint_start:
- ldr x5, psram_data
-check_wake_cpus:
- mrs x0, MPIDR_EL1
- and x1, x0, #MPIDR_CPU_MASK
- and x0, x0, #MPIDR_CLUSTER_MASK
- orr x0, x0, x1
- /* primary_cpu */
- ldr w1, [x5, #PSRAM_DT_MPIDR]
- cmp w0, w1
- b.eq sys_wakeup
- /*
- * If the core is not the primary cpu,
- * force the core into wfe.
- */
-wfe_loop:
- wfe
- b wfe_loop
-sys_wakeup:
- /* check ddr flag for resume ddr */
- ldr w2, [x5, #PSRAM_DT_DDRFLAG]
- cmp w2, #0x0
- b.eq sys_resume
+pmusram_entry_func pmu_cpuson_entrypoint
+
+#if PSRAM_DO_DDR_RESUME
ddr_resume:
- ldr x2, [x5, #PSRAM_DT_SP]
- mov sp, x2
- ldr x1, [x5, #PSRAM_DT_DDR_FUNC]
- ldr x0, [x5, #PSRAM_DT_DDR_DATA]
- blr x1
-sys_resume:
- ldr x1, sys_wakeup_entry
- br x1
+ ldr x2, =__bl31_sram_stack_end
+ mov sp, x2
+ bl dmc_restore
+#endif
- .align 3
-psram_data:
- .quad PSRAM_DT_BASE
-sys_wakeup_entry:
- .quad psci_entrypoint
-pmu_cpuson_entrypoint_end:
- .word 0
+sys_resume:
+ bl psci_entrypoint
endfunc pmu_cpuson_entrypoint