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Tejas Patel9d09ff92019-01-08 01:46:35 -08001/*
2 * Copyright (c) 2019, Xilinx, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef PM_API_SYS_H
8#define PM_API_SYS_H
9
10#include <stdint.h>
Tejas Patelfe0e10a2019-12-08 23:29:44 -080011#include "pm_defs.h"
Tejas Patel9d09ff92019-01-08 01:46:35 -080012
13/**********************************************************
14 * PM API function declarations
15 **********************************************************/
16
17enum pm_ret_status pm_get_api_version(unsigned int *version);
Tejas Patelfe0e10a2019-12-08 23:29:44 -080018enum pm_ret_status pm_self_suspend(uint32_t nid,
19 unsigned int latency,
20 unsigned int state,
21 uintptr_t address);
22enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason);
23enum pm_ret_status pm_req_suspend(uint32_t target,
24 uint8_t ack,
25 unsigned int latency,
26 unsigned int state);
Tejas Patel49cd8712019-01-23 14:18:51 +053027enum pm_ret_status pm_req_wakeup(uint32_t target, uint32_t set_address,
28 uintptr_t address, uint8_t ack);
Tejas Patel41f3e0b2019-01-08 01:46:37 -080029enum pm_ret_status pm_request_device(uint32_t device_id, uint32_t capabilities,
30 uint32_t qos, uint32_t ack);
31enum pm_ret_status pm_release_device(uint32_t device_id);
32enum pm_ret_status pm_set_requirement(uint32_t device_id, uint32_t capabilities,
33 uint32_t latency, uint32_t qos);
34enum pm_ret_status pm_get_device_status(uint32_t device_id, uint32_t *response);
Tejas Patel87c4f3a2019-01-08 01:46:38 -080035enum pm_ret_status pm_reset_assert(uint32_t reset, bool assert);
36enum pm_ret_status pm_reset_get_status(uint32_t reset, uint32_t *status);
Tejas Patel20e92022019-01-08 01:46:39 -080037enum pm_ret_status pm_pinctrl_request(uint32_t pin);
38enum pm_ret_status pm_pinctrl_release(uint32_t pin);
39enum pm_ret_status pm_pinctrl_set_function(uint32_t pin, uint32_t function);
40enum pm_ret_status pm_pinctrl_get_function(uint32_t pin, uint32_t *function);
41enum pm_ret_status pm_pinctrl_set_pin_param(uint32_t pin, uint32_t param,
42 uint32_t value);
43enum pm_ret_status pm_pinctrl_get_pin_param(uint32_t pin, uint32_t param,
44 uint32_t *value);
Tejas Patel1f56fb12019-01-08 01:46:40 -080045enum pm_ret_status pm_clock_enable(uint32_t clk_id);
46enum pm_ret_status pm_clock_disable(uint32_t clk_id);
47enum pm_ret_status pm_clock_get_state(uint32_t clk_id, uint32_t *state);
48enum pm_ret_status pm_clock_set_divider(uint32_t clk_id, uint32_t divider);
49enum pm_ret_status pm_clock_get_divider(uint32_t clk_id, uint32_t *divider);
50enum pm_ret_status pm_clock_set_parent(uint32_t clk_id, uint32_t parent);
51enum pm_ret_status pm_clock_get_parent(uint32_t clk_id, uint32_t *parent);
Tejas Patel023116d2019-01-08 01:46:41 -080052enum pm_ret_status pm_pll_set_param(uint32_t clk_id, uint32_t param,
53 uint32_t value);
54enum pm_ret_status pm_pll_get_param(uint32_t clk_id, uint32_t param,
55 uint32_t *value);
56enum pm_ret_status pm_pll_set_mode(uint32_t clk_id, uint32_t mode);
57enum pm_ret_status pm_pll_get_mode(uint32_t clk_id, uint32_t *mode);
Tejas Patel6b282252019-01-10 03:03:47 -080058enum pm_ret_status pm_force_powerdown(uint32_t target, uint8_t ack);
59enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype);
Tejas Patel9141f442019-01-10 03:03:48 -080060enum pm_ret_status pm_api_ioctl(uint32_t device_id, uint32_t ioctl_id,
61 uint32_t arg1, uint32_t arg2, uint32_t *value);
Tejas Patela3e34ad2019-02-01 17:25:19 +053062enum pm_ret_status pm_query_data(uint32_t qid, uint32_t arg1, uint32_t arg2,
63 uint32_t arg3, uint32_t *data);
Tejas Patel9d09ff92019-01-08 01:46:35 -080064#endif /* PM_API_SYS_H */