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Paul Beesley97743022019-07-12 11:37:07 +01001TF-A Build Instructions for Marvell Platforms
2=============================================
3
4This section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms.
5
6Build Instructions
7------------------
8(1) Set the cross compiler
9
10 .. code:: shell
11
Mark Dykesef3a4562020-01-08 20:37:18 +000012 > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu-
Paul Beesley97743022019-07-12 11:37:07 +010013
14(2) Set path for FIP images:
15
16Set U-Boot image path (relatively to TF-A root or absolute path)
17
18 .. code:: shell
19
20 > export BL33=path/to/u-boot.bin
21
22For example: if U-Boot project (and its images) is located at ``~/project/u-boot``,
23BL33 should be ``~/project/u-boot/u-boot.bin``
24
25 .. note::
26
27 *u-boot.bin* should be used and not *u-boot-spl.bin*
28
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +020029Set MSS/SCP image path (mandatory only for A7K/8K/CN913x)
Paul Beesley97743022019-07-12 11:37:07 +010030
31 .. code:: shell
32
33 > export SCP_BL2=path/to/mrvl_scp_bl2*.img
34
35(3) Armada-37x0 build requires WTP tools installation.
36
37See below in the section "Tools and external components installation".
38Install ARM 32-bit cross compiler, which is required for building WTMI image for CM3
39
40 .. code:: shell
41
42 > sudo apt-get install gcc-arm-linux-gnueabi
43
44(4) Clean previous build residuals (if any)
45
46 .. code:: shell
47
48 > make distclean
49
50(5) Build TF-A
51
52There are several build options:
53
54- DEBUG
55
56 Default is without debug information (=0). in order to enable it use ``DEBUG=1``.
57 Must be disabled when building UART recovery images due to current console driver
58 implementation that is not compatible with Xmodem protocol used for boot image download.
59
60- LOG_LEVEL
61
62 Defines the level of logging which will be purged to the default output port.
63
Pali Rohár8dc46a02020-10-29 17:44:27 +010064 - 0 - LOG_LEVEL_NONE
65 - 10 - LOG_LEVEL_ERROR
66 - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0)
67 - 30 - LOG_LEVEL_WARNING
68 - 40 - LOG_LEVEL_INFO (default for DEBUG=1)
69 - 50 - LOG_LEVEL_VERBOSE
Paul Beesley97743022019-07-12 11:37:07 +010070
71- USE_COHERENT_MEM
72
73 This flag determines whether to include the coherent memory region in the
Pali Rohár8dc46a02020-10-29 17:44:27 +010074 BL memory map or not. Enabled by default.
Paul Beesley97743022019-07-12 11:37:07 +010075
76- LLC_ENABLE
77
78 Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``).
79
Konstantin Porotchkin2ef36a32019-03-31 16:58:11 +030080- LLC_SRAM
81
Konstantin Porotchkin28503262019-04-15 16:32:59 +030082 Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used
83 by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows
84 for SRAM address range at BL31 execution stage with window target set to DRAM-0.
85 When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM.
86 There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n.
87 Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y.
Konstantin Porotchkin2ef36a32019-03-31 16:58:11 +030088
Marek Behún19d85782021-01-05 14:01:05 +010089- CM3_SYSTEM_RESET
90
91 For Armada37x0 only, when ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will
92 be used for system reset.
93 TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the
94 Cortex-M3 secure coprocessor.
95 The firmware running in the coprocessor must either implement this functionality or
96 ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell
97 repository). If this option is enabled but the firmware does not support this command,
98 an error message will be printed prior trying to reboot via the usual way.
99
100 This option is needed on Turris MOX as a workaround to a HW bug which causes reset to
101 sometime hang the board.
102
Paul Beesley97743022019-07-12 11:37:07 +0100103- MARVELL_SECURE_BOOT
104
105 Build trusted(=1)/non trusted(=0) image, default is non trusted.
106
107- BLE_PATH
108
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200109 Points to BLE (Binary ROM extension) sources folder.
110 Only required for A7K/8K/CN913x builds.
Grzegorz Jaszczyk3039bce2019-11-05 13:14:59 +0100111 The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``.
Paul Beesley97743022019-07-12 11:37:07 +0100112
113- MV_DDR_PATH
114
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200115 For A7K/8K/CN913x, use this parameter to point to mv_ddr driver sources to allow BLE build. For A37x0,
Paul Beesley97743022019-07-12 11:37:07 +0100116 it is used for ddr_tool build.
117
118 Usage example: MV_DDR_PATH=path/to/mv_ddr
119
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200120 The parameter is optional for A7K/8K/CN913x, when this parameter is not set, the mv_ddr
Paul Beesley97743022019-07-12 11:37:07 +0100121 sources are expected to be located at: drivers/marvell/mv_ddr. However, the parameter
122 is necessary for A37x0.
123
124 For the mv_ddr source location, check the section "Tools and external components installation"
125
Pali Rohár88f225a2021-01-26 10:44:07 +0100126 If MV_DDR_PATH source code is a git snapshot then provide path to the full git
127 repository (including .git subdir) because mv_ddr build process calls git commands.
128
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200129- CP_NUM
130
131 Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted,
132 the build uses the default number of CPs, which is a number of embedded CPs inside the
133 package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC
134 family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid
135 values with CP_NUM are in a range of 1 to 3.
136
Paul Beesley97743022019-07-12 11:37:07 +0100137- DDR_TOPOLOGY
138
139 For Armada37x0 only, the DDR topology map index/name, default is 0.
140
141 Supported Options:
Pali Rohár8dc46a02020-10-29 17:44:27 +0100142 - 0 - DDR3 1CS: DB-88F3720-DDR3-Modular (512MB); EspressoBIN (512MB)
143 - 1 - DDR4 1CS: DB-88F3720-DDR4-Modular (512MB)
144 - 2 - DDR3 2CS: EspressoBIN V3-V5 (1GB 2CS)
145 - 3 - DDR4 2CS: DB-88F3720-DDR4-Modular (4GB)
146 - 4 - DDR3 1CS: DB-88F3720-DDR3-Modular (1GB); EspressoBIN V3-V5 (1GB 1CS)
147 - 5 - DDR4 1CS: EspressoBin V7 (1GB)
148 - 6 - DDR4 2CS: EspressoBin V7 (2GB)
149 - 7 - DDR3 2CS: EspressoBin V3-V5 (2GB)
150 - CUST - CUSTOMER: Customer board, DDR3 1CS 512MB
Paul Beesley97743022019-07-12 11:37:07 +0100151
152- CLOCKSPRESET
153
154 For Armada37x0 only, the clock tree configuration preset including CPU and DDR frequency,
155 default is CPU_800_DDR_800.
156
Pali Rohár8dc46a02020-10-29 17:44:27 +0100157 - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz
158 - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz
159 - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz
160 - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz
Paul Beesley97743022019-07-12 11:37:07 +0100161
162- BOOTDEV
163
164 For Armada37x0 only, the flash boot device, default is ``SPINOR``.
165
166 Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``:
167
168 - SPINOR - SPI NOR flash boot
169 - SPINAND - SPI NAND flash boot
170 - EMMCNORM - eMMC Download Mode
171
172 Download boot loader or program code from eMMC flash into CM3 or CA53
173 Requires full initialization and command sequence
174
175 - SATA - SATA device boot
176
177- PARTNUM
178
179 For Armada37x0 only, the boot partition number, default is 0.
180
181 To boot from eMMC, the value should be aligned with the parameter in
182 U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is
183 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot
184 build instructions.
185
186- WTMI_IMG
187
188 For Armada37x0 only, the path of the WTMI image can point to an image which
189 does nothing, an image which supports EFUSE or a customized CM3 firmware
190 binary. The default image is wtmi.bin that built from sources in WTP
191 folder, which is the next option. If the default image is OK, then this
192 option should be skipped.
193
194- WTP
195
Pali Rohár8dc46a02020-10-29 17:44:27 +0100196 For Armada37x0 only, use this parameter to point to wtptools source code
197 directory, which can be found as a3700_utils.zip in the release. Usage
198 example: ``WTP=/path/to/a3700_utils``
Paul Beesley97743022019-07-12 11:37:07 +0100199
Pali Rohár88f225a2021-01-26 10:44:07 +0100200 If WTP source code is a git snapshot then provide path to the full git
201 repository (including .git subdir) because WTP build process calls git commands.
202
Pali Rohár8dc46a02020-10-29 17:44:27 +0100203- CRYPTOPP_PATH
Paul Beesley97743022019-07-12 11:37:07 +0100204
Pali Rohára304cf52021-01-26 10:44:07 +0100205 For Armada37x0 only, use this parameter to point to Crypto++ source code
206 directory. If this option is specified then Crypto++ source code in
207 CRYPTOPP_PATH directory will be automatically compiled. Crypto++ library
208 is required for building WTP image tool. Either CRYPTOPP_PATH or
209 CRYPTOPP_LIBDIR with CRYPTOPP_INCDIR needs to be specified for Armada37x0.
210
211- CRYPTOPP_LIBDIR
212
213 For Armada37x0 only, use this parameter to point to the directory with
214 compiled Crypto++ library. By default it points to the CRYPTOPP_PATH.
215
216- CRYPTOPP_INCDIR
217
218 For Armada37x0 only, use this parameter to point to the directory with
219 header files of Crypto++ library. By default it points to the CRYPTOPP_PATH.
Paul Beesley97743022019-07-12 11:37:07 +0100220
Paul Beesley97743022019-07-12 11:37:07 +0100221
Pali Rohár8dc46a02020-10-29 17:44:27 +0100222For example, in order to build the image in debug mode with log level up to 'notice' level run
Paul Beesley97743022019-07-12 11:37:07 +0100223
Pali Rohár8dc46a02020-10-29 17:44:27 +0100224.. code:: shell
225
226 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash
Paul Beesley97743022019-07-12 11:37:07 +0100227
Pali Rohár8dc46a02020-10-29 17:44:27 +0100228And if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level,
229the image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS,
230the image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command
231line is as following
Paul Beesley97743022019-07-12 11:37:07 +0100232
Pali Rohár8dc46a02020-10-29 17:44:27 +0100233.. code:: shell
234
235 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \
236 MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \
237 MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \
238 CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \
239 all fip mrvl_bootimage mrvl_flash
240
241To build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command:
242
243.. code:: shell
244
Marek Behún19d85782021-01-05 14:01:05 +0100245 > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \
246 CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage
Pali Rohár8dc46a02020-10-29 17:44:27 +0100247
Luka Kovaciceb498352021-01-14 14:25:15 +0100248You can build TF-A for the Globalscale ESPRESSObin-Ultra board (DDR4, 1 GB) by running the following command:
249
250.. code:: shell
251
252 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1200_DDR_750 \
253 MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=5 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \
254 MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \
255 CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \
256 all fip mrvl_bootimage mrvl_flash
257
Pali Rohár8dc46a02020-10-29 17:44:27 +0100258Supported MARVELL_PLATFORM are:
259 - a3700 (for both A3720 DB and EspressoBin)
260 - a70x0
261 - a70x0_amc (for AMC board)
262 - a80x0
263 - a80x0_mcbin (for MacchiatoBin)
Luka Kovaciceb498352021-01-14 14:25:15 +0100264 - a80x0_puzzle (for IEI Puzzle-M801)
Pali Rohár8dc46a02020-10-29 17:44:27 +0100265 - t9130 (OcteonTX2 CN913x)
Paul Beesley97743022019-07-12 11:37:07 +0100266
267Special Build Flags
268--------------------
269
270- PLAT_RECOVERY_IMAGE_ENABLE
271 When set this option to enable secondary recovery function when build atf.
272 In order to build UART recovery image this operation should be disabled for
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200273 A7K/8K/CN913x because of hardware limitation (boot from secondary image
Paul Beesley97743022019-07-12 11:37:07 +0100274 can interrupt UART recovery process). This MACRO definition is set in
Grzegorz Jaszczyk3039bce2019-11-05 13:14:59 +0100275 ``plat/marvell/armada/a8k/common/include/platform_def.h`` file.
Paul Beesley97743022019-07-12 11:37:07 +0100276
Alex Leiboviched2fb472019-02-25 12:24:29 +0200277- DDR32
278 In order to work in 32bit DDR, instead of the default 64bit ECC DDR,
279 this flag should be set to 1.
280
Paul Beesleyd2fcc4e2019-05-29 13:59:40 +0100281For more information about build options, please refer to the
282:ref:`Build Options` document.
Paul Beesley97743022019-07-12 11:37:07 +0100283
284
285Build output
286------------
Pali Rohár8dc46a02020-10-29 17:44:27 +0100287Marvell's TF-A compilation generates 8 files:
Paul Beesley97743022019-07-12 11:37:07 +0100288
289 - ble.bin - BLe image
290 - bl1.bin - BL1 image
291 - bl2.bin - BL2 image
292 - bl31.bin - BL31 image
293 - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images)
294 - boot-image.bin - TF-A image (contains BL1 and FIP images)
295 - flash-image.bin - Image which contains boot-image.bin and SPL image.
296 Should be placed on the boot flash/device.
Pali Rohár8dc46a02020-10-29 17:44:27 +0100297 - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images
298 for booting via UART. Could be loaded via Marvell's WtpDownload tool from
299 A3700-utils-marvell repository.
Paul Beesley97743022019-07-12 11:37:07 +0100300
Pali Rohár8dc46a02020-10-29 17:44:27 +0100301Additional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file and target
302``mrvl_flash`` produce final ``flash-image.bin`` and ``uart-images.tgz.bin`` files.
303
Paul Beesley97743022019-07-12 11:37:07 +0100304
305Tools and external components installation
306------------------------------------------
307
308Armada37x0 Builds require installation of 3 components
309~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
310
311(1) ARM cross compiler capable of building images for the service CPU (CM3).
312 This component is usually included in the Linux host packages.
313 On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed
314 using the following command
315
316 .. code:: shell
317
318 > sudo apt-get install gcc-arm-linux-gnueabi
319
320 Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be
321 overwritten using the environment variable ``CROSS_CM3``.
322 Example for BASH shell
323
324 .. code:: shell
325
326 > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi
327
328(2) DDR initialization library sources (mv_ddr) available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100329 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100330
331 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
332
Pali Rohár65c8d112020-10-07 11:01:00 +0200333(3) Armada3700 tools available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100334 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100335
336 https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
337
Pali Rohár8dc46a02020-10-29 17:44:27 +0100338(4) Crypto++ library available at the following repository:
339
340 https://github.com/weidai11/cryptopp.git
341
Paul Beesley97743022019-07-12 11:37:07 +0100342Armada70x0 and Armada80x0 Builds require installation of an additional component
343~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
344
345(1) DDR initialization library sources (mv_ddr) available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100346 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100347
348 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git