blob: 0744bceb4657067c21763685850b7856fc139ef0 [file] [log] [blame]
Andre Przywara6d471e12019-07-09 11:25:57 +01001#
2# Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include lib/libfdt/libfdt.mk
8include lib/xlat_tables_v2/xlat_tables.mk
9
10PLAT_INCLUDES := -Iplat/rpi/common/include \
11 -Iplat/rpi/rpi4/include
12
13PLAT_BL_COMMON_SOURCES := drivers/ti/uart/aarch64/16550_console.S \
Andre Przywara9ba6bb02020-03-10 12:34:56 +000014 drivers/arm/pl011/aarch64/pl011_console.S \
Andre Przywara6d471e12019-07-09 11:25:57 +010015 plat/rpi/common/rpi3_common.c \
16 ${XLAT_TABLES_LIB_SRCS}
17
18BL31_SOURCES += lib/cpus/aarch64/cortex_a72.S \
Andre Przywara98e48562020-03-12 14:20:04 +000019 plat/rpi/common/aarch64/plat_helpers.S \
Andre Przywara2d8e99a2019-07-10 18:09:18 +010020 plat/rpi/rpi4/aarch64/armstub8_header.S \
Andre Przywara6d471e12019-07-09 11:25:57 +010021 drivers/arm/gic/common/gic_common.c \
22 drivers/arm/gic/v2/gicv2_helpers.c \
23 drivers/arm/gic/v2/gicv2_main.c \
Andre Przywara980556d2020-03-11 15:18:03 +000024 drivers/delay_timer/delay_timer.c \
25 drivers/gpio/gpio.c \
26 drivers/rpi3/gpio/rpi3_gpio.c \
Andre Przywara6d471e12019-07-09 11:25:57 +010027 plat/common/plat_gicv2.c \
28 plat/rpi/rpi4/rpi4_bl31_setup.c \
29 plat/rpi/common/rpi3_pm.c \
30 plat/common/plat_psci_common.c \
31 plat/rpi/common/rpi3_topology.c \
Andre Przywara88c9e1d2019-07-11 01:45:39 +010032 common/fdt_fixup.c \
Andre Przywara6d471e12019-07-09 11:25:57 +010033 ${LIBFDT_SRCS}
34
35# For now we only support BL31, using the kernel loaded by the GPU firmware.
36RESET_TO_BL31 := 1
37
38# All CPUs enter armstub8.bin.
39COLD_BOOT_SINGLE_CPU := 0
40
41# Tune compiler for Cortex-A72
42ifeq ($(notdir $(CC)),armclang)
43 TF_CFLAGS_aarch64 += -mcpu=cortex-a72
44else ifneq ($(findstring clang,$(notdir $(CC))),)
45 TF_CFLAGS_aarch64 += -mcpu=cortex-a72
46else
47 TF_CFLAGS_aarch64 += -mtune=cortex-a72
48endif
49
Andre Przywara2d8e99a2019-07-10 18:09:18 +010050# Add support for platform supplied linker script for BL31 build
51$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
Andre Przywara6d471e12019-07-09 11:25:57 +010052
53# Enable all errata workarounds for Cortex-A72
54ERRATA_A72_859971 := 1
55
56WORKAROUND_CVE_2017_5715 := 1
57
58# Add new default target when compiling this platform
59all: bl31
60
61# Build config flags
62# ------------------
63
64# Disable stack protector by default
65ENABLE_STACK_PROTECTOR := 0
66
67# Have different sections for code and rodata
68SEPARATE_CODE_AND_RODATA := 1
69
70# Use Coherent memory
71USE_COHERENT_MEM := 1
72
73# Platform build flags
74# --------------------
75
Andre Przywaraaa89ae42019-07-11 01:42:12 +010076# There is not much else than a Linux kernel to load at the moment.
77RPI3_DIRECT_LINUX_BOOT := 1
Andre Przywara6d471e12019-07-09 11:25:57 +010078
79# BL33 images are in AArch64 by default
80RPI3_BL33_IN_AARCH32 := 0
81
82# UART to use at runtime. -1 means the runtime UART is disabled.
83# Any other value means the default UART will be used.
84RPI3_RUNTIME_UART := 0
85
86# Use normal memory mapping for ROM, FIP, SRAM and DRAM
87RPI3_USE_UEFI_MAP := 0
88
89# Process platform flags
90# ----------------------
91
92$(eval $(call add_define,RPI3_BL33_IN_AARCH32))
93$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
94ifdef RPI3_PRELOADED_DTB_BASE
95$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
96endif
97$(eval $(call add_define,RPI3_RUNTIME_UART))
98$(eval $(call add_define,RPI3_USE_UEFI_MAP))
99
Andre Przywara6d471e12019-07-09 11:25:57 +0100100ifeq (${ARCH},aarch32)
101 $(error Error: AArch32 not supported on rpi4)
102endif
103
104ifneq ($(ENABLE_STACK_PROTECTOR), 0)
105PLAT_BL_COMMON_SOURCES += drivers/rpi3/rng/rpi3_rng.c \
106 plat/rpi/common/rpi3_stack_protector.c
107endif