blob: 1c5e0eaf78b81a28acb158938d6e32e983c12054 [file] [log] [blame]
Jens Wiklander52c798e2015-12-07 14:37:10 +01001/*
Jean-Philippe Brucker721b83d2023-09-07 18:13:07 +01002 * Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
Jens Wiklander52c798e2015-12-07 14:37:10 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Jens Wiklander52c798e2015-12-07 14:37:10 +01005 */
6
7#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009#include <common/bl_common.h>
Maxim Uvarova0b85c22020-12-14 10:17:44 +000010#include <drivers/arm/pl061_gpio.h>
Jean-Philippe Brucker4453ba92023-09-07 18:47:48 +010011#include <lib/gpt_rme/gpt_rme.h>
Raymond Maobb653862023-10-04 09:58:29 -070012#include <lib/transfer_list.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000013#include <plat/common/platform.h>
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +010014#if ENABLE_RME
Mathieu Poirier63a48ca2024-08-16 09:44:09 -060015#ifdef PLAT_qemu
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +010016#include <qemu_pas_def.h>
Mathieu Poirier63a48ca2024-08-16 09:44:09 -060017#elif PLAT_qemu_sbsa
18#include <qemu_sbsa_pas_def.h>
19#endif /* PLAT_qemu */
20#endif /* ENABLE_RME */
Mathieu Poirier61c3ade2024-09-27 15:27:25 -060021#ifdef PLAT_qemu_sbsa
22#include <sbsa_platform.h>
23#endif
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000024
Jens Wiklander52c798e2015-12-07 14:37:10 +010025#include "qemu_private.h"
26
Chen Baozif7d9aa82023-02-20 10:50:15 +000027#define MAP_BL31_TOTAL MAP_REGION_FLAT( \
28 BL31_BASE, \
29 BL31_END - BL31_BASE, \
30 MT_MEMORY | MT_RW | EL3_PAS)
31#define MAP_BL31_RO MAP_REGION_FLAT( \
32 BL_CODE_BASE, \
33 BL_CODE_END - BL_CODE_BASE, \
34 MT_CODE | EL3_PAS), \
35 MAP_REGION_FLAT( \
36 BL_RO_DATA_BASE, \
37 BL_RO_DATA_END \
38 - BL_RO_DATA_BASE, \
39 MT_RO_DATA | EL3_PAS)
40
Chen Baozi097a43a2023-03-12 20:58:04 +080041#if USE_COHERENT_MEM
Chen Baozif7d9aa82023-02-20 10:50:15 +000042#define MAP_BL_COHERENT_RAM MAP_REGION_FLAT( \
43 BL_COHERENT_RAM_BASE, \
44 BL_COHERENT_RAM_END \
45 - BL_COHERENT_RAM_BASE, \
46 MT_DEVICE | MT_RW | EL3_PAS)
Chen Baozi097a43a2023-03-12 20:58:04 +080047#endif
Chen Baozif7d9aa82023-02-20 10:50:15 +000048
Jean-Philippe Brucker8d83b592025-02-11 14:10:34 +000049#if ENABLE_RME
50#if (RME_GPT_BITLOCK_BLOCK == 0)
51#define BITLOCK_BASE UL(0)
52#define BITLOCK_SIZE UL(0)
53#else
54
55/*
56 * Number of bitlock_t entries in the gpt_bitlock array for this platform's
57 * Protected Physical Size. One 8-bit bitlock_t entry covers
58 * 8 * RME_GPT_BITLOCK_BLOCK * 512MB.
59 */
60#if (PLAT_QEMU_PPS > (RME_GPT_BITLOCK_BLOCK * SZ_512M * UL(8)))
61#define BITLOCKS_NUM (PLAT_QEMU_PPS / \
62 (RME_GPT_BITLOCK_BLOCK * SZ_512M * UL(8)))
63#else
64#define BITLOCKS_NUM 1
65#endif
66
67static bitlock_t gpt_bitlock[BITLOCKS_NUM];
68#define BITLOCK_BASE (uintptr_t)gpt_bitlock
69#define BITLOCK_SIZE sizeof(gpt_bitlock)
70#endif /* RME_GPT_BITLOCK_BLOCK */
71#endif /* ENABLE_RME */
72
Jens Wiklander52c798e2015-12-07 14:37:10 +010073/*
Jens Wiklander52c798e2015-12-07 14:37:10 +010074 * Placeholder variables for copying the arguments that have been passed to
75 * BL3-1 from BL2.
76 */
77static entry_point_info_t bl32_image_ep_info;
78static entry_point_info_t bl33_image_ep_info;
Jean-Philippe Bruckerf304bd62023-09-07 17:33:22 +010079#if ENABLE_RME
80static entry_point_info_t rmm_image_ep_info;
81#endif
Raymond Maobb653862023-10-04 09:58:29 -070082static struct transfer_list_header *bl31_tl;
Jens Wiklander52c798e2015-12-07 14:37:10 +010083
84/*******************************************************************************
85 * Perform any BL3-1 early platform setup. Here is an opportunity to copy
John Tsichritzisd653d332018-09-14 10:34:57 +010086 * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before
Jens Wiklander52c798e2015-12-07 14:37:10 +010087 * they are lost (potentially). This needs to be done before the MMU is
88 * initialized so that the memory layout can be used while creating page
89 * tables. BL2 has flushed this information to memory, so we are guaranteed
90 * to pick up good data.
91 ******************************************************************************/
Jens Wiklandere22b91e2018-09-04 14:07:19 +020092void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
93 u_register_t arg2, u_register_t arg3)
Jens Wiklander52c798e2015-12-07 14:37:10 +010094{
Raymond Mao33e41b72024-12-27 06:58:24 -080095 bool is64 = false;
96 uint64_t hval;
97
Jens Wiklander52c798e2015-12-07 14:37:10 +010098 /* Initialize the console to provide early debug support */
Michalis Pappascca6cb72018-03-04 15:43:38 +080099 qemu_console_init();
Jens Wiklander52c798e2015-12-07 14:37:10 +0100100
Marcin Juszkiewiczb6839fb2023-05-10 10:03:01 +0200101/* Platform names have to be lowercase. */
102#ifdef PLAT_qemu_sbsa
Mathieu Poirier61c3ade2024-09-27 15:27:25 -0600103 sbsa_platform_init();
Marcin Juszkiewiczb6839fb2023-05-10 10:03:01 +0200104#endif
105
Fu Weic2f78442017-05-27 21:21:42 +0800106 /*
107 * Check params passed from BL2
108 */
Jens Wiklandere22b91e2018-09-04 14:07:19 +0200109 bl_params_t *params_from_bl2 = (bl_params_t *)arg0;
Fu Weic2f78442017-05-27 21:21:42 +0800110
111 assert(params_from_bl2);
112 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
113 assert(params_from_bl2->h.version >= VERSION_2);
114
115 bl_params_node_t *bl_params = params_from_bl2->head;
116
117 /*
Jean-Philippe Bruckerf304bd62023-09-07 17:33:22 +0100118 * Copy BL33, BL32 and RMM (if present), entry point information.
Fu Weic2f78442017-05-27 21:21:42 +0800119 * They are stored in Secure RAM, in BL2's address space.
120 */
121 while (bl_params) {
Raymond Mao33e41b72024-12-27 06:58:24 -0800122#ifdef __aarch64__
123 if (bl_params->image_id == BL31_IMAGE_ID &&
124 GET_RW(bl_params->ep_info->spsr) == MODE_RW_64)
125 is64 = true;
126#endif
Fu Weic2f78442017-05-27 21:21:42 +0800127 if (bl_params->image_id == BL32_IMAGE_ID)
128 bl32_image_ep_info = *bl_params->ep_info;
129
Jean-Philippe Bruckerf304bd62023-09-07 17:33:22 +0100130#if ENABLE_RME
131 if (bl_params->image_id == RMM_IMAGE_ID)
132 rmm_image_ep_info = *bl_params->ep_info;
133#endif
134
Fu Weic2f78442017-05-27 21:21:42 +0800135 if (bl_params->image_id == BL33_IMAGE_ID)
136 bl33_image_ep_info = *bl_params->ep_info;
137
138 bl_params = bl_params->next_params_info;
139 }
140
141 if (!bl33_image_ep_info.pc)
142 panic();
Jean-Philippe Bruckerf304bd62023-09-07 17:33:22 +0100143#if ENABLE_RME
144 if (!rmm_image_ep_info.pc)
145 panic();
146#endif
Raymond Maobb653862023-10-04 09:58:29 -0700147
Raymond Mao33e41b72024-12-27 06:58:24 -0800148 if (!TRANSFER_LIST ||
149 !transfer_list_check_header((void *)arg3))
150 return;
151
152 if (is64)
153 hval = TRANSFER_LIST_HANDOFF_X1_VALUE(REGISTER_CONVENTION_VERSION);
154 else
155 hval = TRANSFER_LIST_HANDOFF_R1_VALUE(REGISTER_CONVENTION_VERSION);
156
157 if (arg1 != hval)
158 return;
159
160 bl31_tl = (void *)arg3; /* saved TL address from BL2 */
Jens Wiklander52c798e2015-12-07 14:37:10 +0100161}
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +0100162
163#if ENABLE_RME
Mathieu Poirier63a48ca2024-08-16 09:44:09 -0600164#if PLAT_qemu
165/*
166 * The GPT library might modify the gpt regions structure to optimize
167 * the layout, so the array cannot be constant.
168 */
169static pas_region_t pas_regions[] = {
170 QEMU_PAS_ROOT,
171 QEMU_PAS_SECURE,
172 QEMU_PAS_GPTS,
173 QEMU_PAS_NS0,
174 QEMU_PAS_REALM,
175 QEMU_PAS_NS1,
176};
177
178static inline void bl31_adjust_pas_regions(void) {}
179#elif PLAT_qemu_sbsa
180/*
181 * The GPT library might modify the gpt regions structure to optimize
182 * the layout, so the array cannot be constant.
183 */
184static pas_region_t pas_regions[] = {
185 QEMU_PAS_ROOT,
186 QEMU_PAS_SECURE,
187 QEMU_PAS_GPTS,
188 QEMU_PAS_REALM,
189 QEMU_PAS_NS0,
190};
191
192static void bl31_adjust_pas_regions(void)
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +0100193{
Mathieu Poirier63a48ca2024-08-16 09:44:09 -0600194 uint64_t base_addr = 0, total_size = 0;
195 struct platform_memory_data data;
196 uint32_t node;
197
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +0100198 /*
Mathieu Poirier63a48ca2024-08-16 09:44:09 -0600199 * The amount of memory supported by the SBSA platform is dynamic
200 * and dependent on user input. Since the configuration of the GPT
201 * needs to reflect the system memory, QEMU_PAS_NS0 needs to be set
202 * based on the information found in the device tree.
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +0100203 */
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +0100204
Mathieu Poirier63a48ca2024-08-16 09:44:09 -0600205 for (node = 0; node < sbsa_platform_num_memnodes(); node++) {
206 data = sbsa_platform_memory_node(node);
207
208 if (data.nodeid == 0) {
209 base_addr = data.addr_base;
210 }
211
212 total_size += data.addr_size;
213 }
214
215 /* Index '4' correspond to QEMU_PAS_NS0, see pas_regions[] above */
216 pas_regions[4].base_pa = base_addr;
217 pas_regions[4].size = total_size;
218}
219#endif /* PLAT_qemu */
220
221static void bl31_plat_gpt_setup(void)
222{
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +0100223 /*
224 * Initialize entire protected space to GPT_GPI_ANY. With each L0 entry
225 * covering 1GB (currently the only supported option), then covering
226 * 256TB of RAM (48-bit PA) would require a 2MB L0 region. At the
227 * moment we use a 8KB table, which covers 1TB of RAM (40-bit PA).
228 */
Jean-Philippe Brucker8d83b592025-02-11 14:10:34 +0000229 if (gpt_init_l0_tables(PLAT_QEMU_GPCCR_PPS, PLAT_QEMU_L0_GPT_BASE,
230 PLAT_QEMU_L0_GPT_SIZE) < 0) {
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +0100231 ERROR("gpt_init_l0_tables() failed!\n");
232 panic();
233 }
234
Mathieu Poirier63a48ca2024-08-16 09:44:09 -0600235 bl31_adjust_pas_regions();
236
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +0100237 /* Carve out defined PAS ranges. */
238 if (gpt_init_pas_l1_tables(GPCCR_PGS_4K,
239 PLAT_QEMU_L1_GPT_BASE,
240 PLAT_QEMU_L1_GPT_SIZE,
241 pas_regions,
242 (unsigned int)(sizeof(pas_regions) /
243 sizeof(pas_region_t))) < 0) {
244 ERROR("gpt_init_pas_l1_tables() failed!\n");
245 panic();
246 }
247
248 INFO("Enabling Granule Protection Checks\n");
249 if (gpt_enable() < 0) {
250 ERROR("gpt_enable() failed!\n");
251 panic();
252 }
253}
254#endif
Jens Wiklander52c798e2015-12-07 14:37:10 +0100255
256void bl31_plat_arch_setup(void)
257{
Chen Baozif7d9aa82023-02-20 10:50:15 +0000258 const mmap_region_t bl_regions[] = {
259 MAP_BL31_TOTAL,
260 MAP_BL31_RO,
Chen Baozi097a43a2023-03-12 20:58:04 +0800261#if USE_COHERENT_MEM
Chen Baozif7d9aa82023-02-20 10:50:15 +0000262 MAP_BL_COHERENT_RAM,
Chen Baozi097a43a2023-03-12 20:58:04 +0800263#endif
Jean-Philippe Brucker721b83d2023-09-07 18:13:07 +0100264#if ENABLE_RME
265 MAP_GPT_L0_REGION,
266 MAP_GPT_L1_REGION,
267 MAP_RMM_SHARED_MEM,
268#endif
Chen Baozif7d9aa82023-02-20 10:50:15 +0000269 {0}
270 };
271
272 setup_page_tables(bl_regions, plat_qemu_get_mmap());
273
274 enable_mmu_el3(0);
Jean-Philippe Brucker4453ba92023-09-07 18:47:48 +0100275
276#if ENABLE_RME
Jean-Philippe Brucker997dda02024-08-16 09:49:38 +0100277 /* Initialise and enable granule protection after MMU. */
278 bl31_plat_gpt_setup();
279
Jean-Philippe Brucker4453ba92023-09-07 18:47:48 +0100280 /*
281 * Initialise Granule Protection library and enable GPC for the primary
282 * processor. The tables have already been initialized by a previous BL
283 * stage, so there is no need to provide any PAS here. This function
284 * sets up pointers to those tables.
285 */
Jean-Philippe Brucker8d83b592025-02-11 14:10:34 +0000286 if (gpt_runtime_init(BITLOCK_BASE, BITLOCK_SIZE) < 0) {
Jean-Philippe Brucker4453ba92023-09-07 18:47:48 +0100287 ERROR("gpt_runtime_init() failed!\n");
288 panic();
289 }
290#endif /* ENABLE_RME */
291
Jens Wiklander52c798e2015-12-07 14:37:10 +0100292}
293
Maxim Uvarova0b85c22020-12-14 10:17:44 +0000294static void qemu_gpio_init(void)
295{
296#ifdef SECURE_GPIO_BASE
297 pl061_gpio_init();
298 pl061_gpio_register(SECURE_GPIO_BASE, 0);
299#endif
300}
301
Jens Wiklander52c798e2015-12-07 14:37:10 +0100302void bl31_platform_setup(void)
303{
Hongbo Zhang32338ec2018-04-19 13:06:07 +0800304 plat_qemu_gic_init();
Maxim Uvarova0b85c22020-12-14 10:17:44 +0000305 qemu_gpio_init();
Jens Wiklander52c798e2015-12-07 14:37:10 +0100306}
307
308unsigned int plat_get_syscnt_freq2(void)
309{
Marcin Juszkiewiczb9a35532024-04-22 17:27:56 +0200310 return read_cntfrq_el0();
Jens Wiklander52c798e2015-12-07 14:37:10 +0100311}
312
313/*******************************************************************************
314 * Return a pointer to the 'entry_point_info' structure of the next image
315 * for the security state specified. BL3-3 corresponds to the non-secure
316 * image type while BL3-2 corresponds to the secure image type. A NULL
317 * pointer is returned if the image does not exist.
318 ******************************************************************************/
319entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
320{
321 entry_point_info_t *next_image_info;
322
323 assert(sec_state_is_valid(type));
Jean-Philippe Bruckerf304bd62023-09-07 17:33:22 +0100324 if (type == NON_SECURE) {
325 next_image_info = &bl33_image_ep_info;
326 }
327#if ENABLE_RME
328 else if (type == REALM) {
329 next_image_info = &rmm_image_ep_info;
330 }
331#endif
332 else {
333 next_image_info = &bl32_image_ep_info;
334 }
335
Jens Wiklander52c798e2015-12-07 14:37:10 +0100336 /*
337 * None of the images on the ARM development platforms can have 0x0
338 * as the entrypoint
339 */
340 if (next_image_info->pc)
341 return next_image_info;
342 else
343 return NULL;
344}
Raymond Maobb653862023-10-04 09:58:29 -0700345
346void bl31_plat_runtime_setup(void)
347{
Raymond Maobb653862023-10-04 09:58:29 -0700348#if TRANSFER_LIST
349 if (bl31_tl) {
350 /*
Raymond Maoac158782024-12-27 07:20:25 -0800351 * Relocate the TL from S to NS memory before EL3 exit
Raymond Maobb653862023-10-04 09:58:29 -0700352 * to reflect all changes in TL done by BL32
353 */
Raymond Maoac158782024-12-27 07:20:25 -0800354 if (!transfer_list_relocate(bl31_tl, (void *)FW_NS_HANDOFF_BASE,
355 bl31_tl->max_size))
356 ERROR("Relocate TL to NS memory failed\n");
Raymond Maobb653862023-10-04 09:58:29 -0700357 }
358#endif
Jens Wiklander7ad51de2024-03-01 09:07:19 +0100359
360 console_flush();
361 console_switch_state(CONSOLE_FLAG_RUNTIME);
Raymond Maobb653862023-10-04 09:58:29 -0700362}