Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Dan Handley | e83b0ca | 2014-01-14 18:17:09 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 31 | #include <assert.h> |
Soby Mathew | 52f52b4 | 2014-03-12 14:52:51 +0000 | [diff] [blame] | 32 | #include <console.h> |
| 33 | #include <platform.h> |
| 34 | #include <pl011.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 35 | |
Vikram Kanigiri | 3ff77de | 2014-03-25 17:35:26 +0000 | [diff] [blame] | 36 | static unsigned long uart_base; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 37 | |
Soby Mathew | 52f52b4 | 2014-03-12 14:52:51 +0000 | [diff] [blame] | 38 | void console_init(unsigned long base_addr) |
| 39 | { |
Vikram Kanigiri | 3ff77de | 2014-03-25 17:35:26 +0000 | [diff] [blame] | 40 | /* TODO: assert() internally calls printf() and will result in |
| 41 | * an infinite loop. This needs to be fixed with some kind of |
| 42 | * exception mechanism or early panic support. This also applies |
| 43 | * to the other assert() calls below. |
| 44 | */ |
| 45 | assert(base_addr); |
| 46 | |
Soby Mathew | 52f52b4 | 2014-03-12 14:52:51 +0000 | [diff] [blame] | 47 | /* Initialise internal base address variable */ |
| 48 | uart_base = base_addr; |
| 49 | |
| 50 | /* Baud Rate */ |
| 51 | #if defined(PL011_INTEGER) && defined(PL011_FRACTIONAL) |
| 52 | pl011_write_ibrd(uart_base, PL011_INTEGER); |
| 53 | pl011_write_fbrd(uart_base, PL011_FRACTIONAL); |
| 54 | #else |
| 55 | pl011_setbaudrate(uart_base, PL011_BAUDRATE); |
| 56 | #endif |
| 57 | |
| 58 | pl011_write_lcr_h(uart_base, PL011_LINE_CONTROL); |
| 59 | |
| 60 | /* Clear any pending errors */ |
| 61 | pl011_write_ecr(uart_base, 0); |
| 62 | |
| 63 | /* Enable tx, rx, and uart overall */ |
| 64 | pl011_write_cr(uart_base, PL011_UARTCR_RXE | PL011_UARTCR_TXE | |
| 65 | PL011_UARTCR_UARTEN); |
| 66 | |
| 67 | } |
| 68 | |
| 69 | int console_putc(int c) |
| 70 | { |
Vikram Kanigiri | 3ff77de | 2014-03-25 17:35:26 +0000 | [diff] [blame] | 71 | assert(uart_base); |
| 72 | |
Soby Mathew | 52f52b4 | 2014-03-12 14:52:51 +0000 | [diff] [blame] | 73 | if (c == '\n') |
| 74 | console_putc('\r'); |
| 75 | |
| 76 | while ((pl011_read_fr(uart_base) & PL011_UARTFR_TXFF) == 1) |
| 77 | ; |
| 78 | pl011_write_dr(uart_base, c); |
| 79 | return c; |
| 80 | } |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 81 | |
Soby Mathew | 52f52b4 | 2014-03-12 14:52:51 +0000 | [diff] [blame] | 82 | int console_getc(void) |
| 83 | { |
Vikram Kanigiri | 3ff77de | 2014-03-25 17:35:26 +0000 | [diff] [blame] | 84 | assert(uart_base); |
| 85 | |
Soby Mathew | 52f52b4 | 2014-03-12 14:52:51 +0000 | [diff] [blame] | 86 | while ((pl011_read_fr(uart_base) & PL011_UARTFR_RXFE) != 0) |
| 87 | ; |
| 88 | return pl011_read_dr(uart_base); |
| 89 | } |