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John Tsichritzis4daa1de2018-07-23 09:11:59 +01001/*
Pramod Kumarf01ea602020-02-05 11:27:57 +05302 * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
John Tsichritzis4daa1de2018-07-23 09:11:59 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <asm_macros.S>
8#include <dsu_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009#include <lib/cpus/errata_report.h>
John Tsichritzis4daa1de2018-07-23 09:11:59 +010010
Louis Mayencourt254f6f02019-04-09 14:11:06 +010011 /* -----------------------------------------------------------------------
Louis Mayencourt4498b152019-04-09 16:29:01 +010012 * DSU erratum 798953 check function
13 * Checks the DSU variant, revision and configuration to determine if
14 * the erratum applies. Erratum applies on all configurations of the
15 * DSU and if revision-variant is r0p0.
16 *
17 * The erratum was fixed in r0p1.
18 *
19 * This function is called from both assembly and C environment. So it
20 * follows AAPCS.
21 *
22 * Clobbers: x0-x3
23 * -----------------------------------------------------------------------
24 */
25 .globl check_errata_dsu_798953
26 .globl errata_dsu_798953_wa
27
28func check_errata_dsu_798953
29 mov x2, #ERRATA_APPLIES
30 mov x3, #ERRATA_NOT_APPLIES
31
32 /* Check if DSU is equal to r0p0 */
33 mrs x1, CLUSTERIDR_EL1
34
35 /* DSU variant and revision bitfields in CLUSTERIDR are adjacent */
36 ubfx x0, x1, #CLUSTERIDR_REV_SHIFT,\
37 #(CLUSTERIDR_REV_BITS + CLUSTERIDR_VAR_BITS)
38 mov x1, #(0x0 << CLUSTERIDR_REV_SHIFT)
39 cmp x0, x1
40 csel x0, x2, x3, EQ
41 ret
42endfunc check_errata_dsu_798953
43
44 /* --------------------------------------------------
45 * Errata Workaround for DSU erratum #798953.
46 *
47 * Can clobber only: x0-x17
48 * --------------------------------------------------
49 */
50func errata_dsu_798953_wa
51 mov x17, x30
52 bl check_errata_dsu_798953
53 cbz x0, 1f
54
55 /* If erratum applies, disable high-level clock gating */
56 mrs x0, CLUSTERACTLR_EL1
57 orr x0, x0, #CLUSTERACTLR_EL1_DISABLE_CLOCK_GATING
58 msr CLUSTERACTLR_EL1, x0
59 isb
601:
61 ret x17
62endfunc errata_dsu_798953_wa
63
64 /* -----------------------------------------------------------------------
Louis Mayencourt254f6f02019-04-09 14:11:06 +010065 * DSU erratum 936184 check function
66 * Checks the DSU variant, revision and configuration to determine if
67 * the erratum applies. Erratum applies if ACP interface is present
68 * in the DSU and revision-variant < r2p0.
69 *
70 * The erratum was fixed in r2p0.
71 *
72 * This function is called from both assembly and C environment. So it
73 * follows AAPCS.
74 *
Pramod Kumarf01ea602020-02-05 11:27:57 +053075 * Clobbers: x0-x15
Louis Mayencourt254f6f02019-04-09 14:11:06 +010076 * -----------------------------------------------------------------------
77 */
John Tsichritzis4daa1de2018-07-23 09:11:59 +010078 .globl check_errata_dsu_936184
79 .globl errata_dsu_936184_wa
Pramod Kumarf01ea602020-02-05 11:27:57 +053080 .weak is_scu_present_in_dsu
81
82 /* --------------------------------------------------------------------
83 * Default behaviour respresents SCU is always present with DSU.
84 * CPUs can override this definition if required.
85 *
86 * Can clobber only: x0-x14
87 * --------------------------------------------------------------------
88 */
89func is_scu_present_in_dsu
90 mov x0, #1
91 ret
92endfunc is_scu_present_in_dsu
John Tsichritzis4daa1de2018-07-23 09:11:59 +010093
94func check_errata_dsu_936184
Pramod Kumarf01ea602020-02-05 11:27:57 +053095 mov x15, x30
96 bl is_scu_present_in_dsu
97 cmp x0, xzr
98 /* Default error status */
99 mov x0, #ERRATA_NOT_APPLIES
100
101 /* If SCU is not present, return without applying patch */
102 b.eq 1f
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100103
John Tsichritzis13110b42018-08-22 10:40:33 +0100104 /* Erratum applies only if DSU has the ACP interface */
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100105 mrs x1, CLUSTERCFR_EL1
106 ubfx x1, x1, #CLUSTERCFR_ACP_SHIFT, #1
107 cbz x1, 1f
108
109 /* If ACP is present, check if DSU is older than r2p0 */
110 mrs x1, CLUSTERIDR_EL1
111
112 /* DSU variant and revision bitfields in CLUSTERIDR are adjacent */
Pramod Kumarf01ea602020-02-05 11:27:57 +0530113 ubfx x2, x1, #CLUSTERIDR_REV_SHIFT,\
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100114 #(CLUSTERIDR_REV_BITS + CLUSTERIDR_VAR_BITS)
Pramod Kumarf01ea602020-02-05 11:27:57 +0530115 cmp x2, #(0x2 << CLUSTERIDR_VAR_SHIFT)
116 b.hs 1f
117 mov x0, #ERRATA_APPLIES
John Tsichritzis4daa1de2018-07-23 09:11:59 +01001181:
Pramod Kumarf01ea602020-02-05 11:27:57 +0530119 ret x15
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100120endfunc check_errata_dsu_936184
121
Louis Mayencourt254f6f02019-04-09 14:11:06 +0100122 /* --------------------------------------------------
123 * Errata Workaround for DSU erratum #936184.
124 *
125 * Can clobber only: x0-x17
126 * --------------------------------------------------
127 */
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100128func errata_dsu_936184_wa
John Tsichritzis13110b42018-08-22 10:40:33 +0100129 mov x17, x30
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100130 bl check_errata_dsu_936184
131 cbz x0, 1f
132
133 /* If erratum applies, we set a mask to a DSU control register */
134 mrs x0, CLUSTERACTLR_EL1
135 ldr x1, =DSU_ERRATA_936184_MASK
136 orr x0, x0, x1
137 msr CLUSTERACTLR_EL1, x0
138 isb
1391:
John Tsichritzis13110b42018-08-22 10:40:33 +0100140 ret x17
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100141endfunc errata_dsu_936184_wa