Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 1 | /* |
Anthony Zhou | 59fd615 | 2017-03-13 15:34:08 +0800 | [diff] [blame] | 2 | * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 5 | */ |
| 6 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 7 | #ifndef TEGRA_PRIVATE_H |
| 8 | #define TEGRA_PRIVATE_H |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 9 | |
Varun Wadekar | a78bb1b | 2015-08-07 10:03:00 +0530 | [diff] [blame] | 10 | #include <arch.h> |
Varun Wadekar | 9f4a7d3 | 2018-10-19 11:42:28 -0700 | [diff] [blame] | 11 | #include <arch_helpers.h> |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 12 | #include <platform_def.h> |
Yatharth Kochar | 33f5c41 | 2015-12-09 14:22:47 +0000 | [diff] [blame] | 13 | #include <psci.h> |
Varun Wadekar | 9f4a7d3 | 2018-10-19 11:42:28 -0700 | [diff] [blame] | 14 | #include <tegra_gic.h> |
Andreas Färber | 92cea4a | 2018-02-17 06:02:32 +0100 | [diff] [blame] | 15 | #include <xlat_tables_v2.h> |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 16 | |
Varun Wadekar | 7a269e2 | 2015-06-10 14:04:32 +0530 | [diff] [blame] | 17 | /******************************************************************************* |
| 18 | * Tegra DRAM memory base address |
| 19 | ******************************************************************************/ |
Varun Wadekar | 761ca73 | 2017-04-24 14:17:12 -0700 | [diff] [blame] | 20 | #define TEGRA_DRAM_BASE ULL(0x80000000) |
| 21 | #define TEGRA_DRAM_END ULL(0x27FFFFFFF) |
Varun Wadekar | 7a269e2 | 2015-06-10 14:04:32 +0530 | [diff] [blame] | 22 | |
Varun Wadekar | b7b4575 | 2015-12-28 14:55:41 -0800 | [diff] [blame] | 23 | /******************************************************************************* |
| 24 | * Struct for parameters received from BL2 |
| 25 | ******************************************************************************/ |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 26 | typedef struct plat_params_from_bl2 { |
Varun Wadekar | 6bb6246 | 2015-10-06 12:49:31 +0530 | [diff] [blame] | 27 | /* TZ memory size */ |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 28 | uint64_t tzdram_size; |
Varun Wadekar | 6bb6246 | 2015-10-06 12:49:31 +0530 | [diff] [blame] | 29 | /* TZ memory base */ |
| 30 | uint64_t tzdram_base; |
Varun Wadekar | d2014c6 | 2015-10-29 10:37:28 +0530 | [diff] [blame] | 31 | /* UART port ID */ |
| 32 | int uart_id; |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 33 | } plat_params_from_bl2_t; |
| 34 | |
Varun Wadekar | dc79930 | 2015-12-28 16:36:42 -0800 | [diff] [blame] | 35 | /******************************************************************************* |
Antonio Nino Diaz | 6bf7c6b | 2018-09-24 17:16:05 +0100 | [diff] [blame] | 36 | * Struct describing parameters passed to bl31 |
| 37 | ******************************************************************************/ |
| 38 | struct tegra_bl31_params { |
| 39 | param_header_t h; |
| 40 | image_info_t *bl31_image_info; |
| 41 | entry_point_info_t *bl32_ep_info; |
| 42 | image_info_t *bl32_image_info; |
| 43 | entry_point_info_t *bl33_ep_info; |
| 44 | image_info_t *bl33_image_info; |
| 45 | }; |
| 46 | |
Varun Wadekar | 254441d | 2015-07-23 10:07:54 +0530 | [diff] [blame] | 47 | /* Declarations for plat_psci_handlers.c */ |
Varun Wadekar | a78bb1b | 2015-08-07 10:03:00 +0530 | [diff] [blame] | 48 | int32_t tegra_soc_validate_power_state(unsigned int power_state, |
| 49 | psci_power_state_t *req_state); |
Varun Wadekar | 254441d | 2015-07-23 10:07:54 +0530 | [diff] [blame] | 50 | |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 51 | /* Declarations for plat_setup.c */ |
| 52 | const mmap_region_t *plat_get_mmio_map(void); |
Varun Wadekar | d2014c6 | 2015-10-29 10:37:28 +0530 | [diff] [blame] | 53 | uint32_t plat_get_console_from_id(int id); |
Varun Wadekar | b7b4575 | 2015-12-28 14:55:41 -0800 | [diff] [blame] | 54 | void plat_gic_setup(void); |
Antonio Nino Diaz | 6bf7c6b | 2018-09-24 17:16:05 +0100 | [diff] [blame] | 55 | struct tegra_bl31_params *plat_get_bl31_params(void); |
Varun Wadekar | d22d4ad | 2016-05-23 11:41:07 -0700 | [diff] [blame] | 56 | plat_params_from_bl2_t *plat_get_bl31_plat_params(void); |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 57 | |
| 58 | /* Declarations for plat_secondary.c */ |
| 59 | void plat_secondary_setup(void); |
| 60 | int plat_lock_cpu_vectors(void); |
| 61 | |
Varun Wadekar | dc79930 | 2015-12-28 16:36:42 -0800 | [diff] [blame] | 62 | /* Declarations for tegra_fiq_glue.c */ |
| 63 | void tegra_fiq_handler_setup(void); |
| 64 | int tegra_fiq_get_intr_context(void); |
| 65 | void tegra_fiq_set_ns_entrypoint(uint64_t entrypoint); |
| 66 | |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 67 | /* Declarations for tegra_security.c */ |
| 68 | void tegra_security_setup(void); |
| 69 | void tegra_security_setup_videomem(uintptr_t base, uint64_t size); |
| 70 | |
| 71 | /* Declarations for tegra_pm.c */ |
Vignesh Radhakrishnan | b4a7294 | 2017-03-03 10:58:05 -0800 | [diff] [blame] | 72 | extern uint8_t tegra_fake_system_suspend; |
| 73 | |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 74 | void tegra_pm_system_suspend_entry(void); |
| 75 | void tegra_pm_system_suspend_exit(void); |
| 76 | int tegra_system_suspended(void); |
| 77 | |
| 78 | /* Declarations for tegraXXX_pm.c */ |
| 79 | int tegra_prepare_cpu_suspend(unsigned int id, unsigned int afflvl); |
| 80 | int tegra_prepare_cpu_on_finish(unsigned long mpidr); |
| 81 | |
| 82 | /* Declarations for tegra_bl31_setup.c */ |
| 83 | plat_params_from_bl2_t *bl31_get_plat_params(void); |
Varun Wadekar | 7a269e2 | 2015-06-10 14:04:32 +0530 | [diff] [blame] | 84 | int bl31_check_ns_address(uint64_t base, uint64_t size_in_bytes); |
Varun Wadekar | 3f0a8ad | 2016-03-28 15:56:47 -0700 | [diff] [blame] | 85 | void plat_early_platform_setup(void); |
Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 86 | |
Varun Wadekar | bc74fec | 2015-07-16 15:47:03 +0530 | [diff] [blame] | 87 | /* Declarations for tegra_delay_timer.c */ |
| 88 | void tegra_delay_timer_init(void); |
| 89 | |
Varun Wadekar | 93bed2a | 2016-03-18 13:07:33 -0700 | [diff] [blame] | 90 | void tegra_secure_entrypoint(void); |
| 91 | void tegra186_cpu_reset_handler(void); |
| 92 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 93 | #endif /* TEGRA_PRIVATE_H */ |