Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 1 | # |
Rohit Mathew | 73f503f | 2022-07-08 13:00:22 +0100 | [diff] [blame] | 2 | # Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved. |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
Chandni Cherukuri | d61a705 | 2018-08-01 15:58:48 +0530 | [diff] [blame] | 7 | CSS_USE_SCMI_SDS_DRIVER := 1 |
| 8 | |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 9 | CSS_ENT_BASE := plat/arm/css/sgi |
| 10 | |
Manish Pandey | d419e22 | 2023-02-13 12:39:17 +0000 | [diff] [blame] | 11 | ENABLE_FEAT_RAS := 1 |
| 12 | |
Sughosh Ganu | 3f7e79d | 2018-05-16 18:48:56 +0530 | [diff] [blame] | 13 | SDEI_SUPPORT := 0 |
| 14 | |
| 15 | EL3_EXCEPTION_HANDLING := 0 |
| 16 | |
Manish Pandey | 0e3379d | 2022-10-10 11:43:08 +0100 | [diff] [blame] | 17 | HANDLE_EA_EL3_FIRST_NS := 0 |
Sughosh Ganu | 3f7e79d | 2018-05-16 18:48:56 +0530 | [diff] [blame] | 18 | |
Vijayenthiran Subramaniam | bc48991 | 2019-12-26 17:45:58 +0530 | [diff] [blame] | 19 | CSS_SGI_CHIP_COUNT := 1 |
| 20 | |
Aditya Angadi | 0640222 | 2021-03-20 12:06:15 +0530 | [diff] [blame] | 21 | CSS_SGI_PLATFORM_VARIANT := 0 |
| 22 | |
Vijayenthiran Subramaniam | 063bb73 | 2021-11-25 21:54:30 +0530 | [diff] [blame] | 23 | # Do not enable SVE |
| 24 | ENABLE_SVE_FOR_NS := 0 |
| 25 | |
Nishant Sharma | 469a6f6 | 2022-04-19 10:23:59 +0100 | [diff] [blame] | 26 | CTX_INCLUDE_FPREGS := 1 |
| 27 | |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 28 | INTERCONNECT_SOURCES := ${CSS_ENT_BASE}/sgi_interconnect.c |
| 29 | |
| 30 | PLAT_INCLUDES += -I${CSS_ENT_BASE}/include |
| 31 | |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 32 | # GIC-600 configuration |
Andre Przywara | e1cc130 | 2020-03-25 15:50:38 +0000 | [diff] [blame] | 33 | GICV3_SUPPORT_GIC600 := 1 |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 34 | |
| 35 | # Include GICv3 driver files |
| 36 | include drivers/arm/gic/v3/gicv3.mk |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 37 | |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 38 | ENT_GIC_SOURCES := ${GICV3_SOURCES} \ |
| 39 | plat/common/plat_gicv3.c \ |
| 40 | plat/arm/common/arm_gicv3.c |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 41 | |
Aditya Angadi | 502d0ac | 2020-11-18 08:27:15 +0530 | [diff] [blame] | 42 | PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/aarch64/sgi_helper.S |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 43 | |
Aditya Angadi | 20b4841 | 2019-04-16 11:29:14 +0530 | [diff] [blame] | 44 | BL1_SOURCES += ${INTERCONNECT_SOURCES} \ |
| 45 | drivers/arm/sbsa/sbsa.c |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 46 | |
Nishant Sharma | 289f782 | 2021-11-30 09:31:48 +0000 | [diff] [blame] | 47 | BL2_SOURCES += ${CSS_ENT_BASE}/sgi_image_load.c \ |
| 48 | drivers/arm/css/sds/sds.c |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 49 | |
Chandni Cherukuri | a3f6613 | 2018-08-10 11:17:58 +0530 | [diff] [blame] | 50 | BL31_SOURCES += ${INTERCONNECT_SOURCES} \ |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 51 | ${ENT_GIC_SOURCES} \ |
| 52 | ${CSS_ENT_BASE}/sgi_bl31_setup.c \ |
Chandni Cherukuri | a5d44ec | 2018-08-14 15:25:34 +0530 | [diff] [blame] | 53 | ${CSS_ENT_BASE}/sgi_topology.c |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 54 | |
Deepak Pandey | b0971f9 | 2018-05-25 12:43:30 +0530 | [diff] [blame] | 55 | ifneq (${RESET_TO_BL31},0) |
Sandrine Bailleux | 1e32d32 | 2019-01-07 15:35:37 +0100 | [diff] [blame] | 56 | $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \ |
Deepak Pandey | b0971f9 | 2018-05-25 12:43:30 +0530 | [diff] [blame] | 57 | Please set RESET_TO_BL31 to 0.") |
| 58 | endif |
| 59 | |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 60 | $(eval $(call add_define,SGI_PLAT)) |
| 61 | |
Vijayenthiran Subramaniam | bc48991 | 2019-12-26 17:45:58 +0530 | [diff] [blame] | 62 | $(eval $(call add_define,CSS_SGI_CHIP_COUNT)) |
| 63 | |
Aditya Angadi | 0640222 | 2021-03-20 12:06:15 +0530 | [diff] [blame] | 64 | $(eval $(call add_define,CSS_SGI_PLATFORM_VARIANT)) |
| 65 | |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 66 | override CSS_LOAD_SCP_IMAGES := 0 |
| 67 | override NEED_BL2U := no |
Sudipto Paul | c451010 | 2018-04-16 17:46:50 +0530 | [diff] [blame] | 68 | override ARM_PLAT_MT := 1 |
Pranav Madhu | 4c47432 | 2021-04-20 12:01:46 +0530 | [diff] [blame] | 69 | override PSCI_EXTENDED_STATE_ID := 1 |
| 70 | override ARM_RECOM_STATE_ID_ENC := 1 |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 71 | |
| 72 | # System coherency is managed in hardware |
| 73 | HW_ASSISTED_COHERENCY := 1 |
| 74 | |
| 75 | # When building for systems with hardware-assisted coherency, there's no need to |
| 76 | # use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. |
| 77 | USE_COHERENT_MEM := 0 |
| 78 | |
| 79 | include plat/arm/common/arm_common.mk |
| 80 | include plat/arm/css/common/css_common.mk |
| 81 | include plat/arm/soc/common/soc_css.mk |
| 82 | include plat/arm/board/common/board_common.mk |