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git01.mediatek.com / filogic / atf / d419e225aa99fb7f98370865be3abc7333f954a6 / . / plat / arm / css / sgi / sgi-common.mk
blob: 6d17bc22f6298bc4603c98249b0af3d41eb83b11 [file] [log] [blame]
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]1#
Rohit Mathew73f503f2022-07-08 13:00:22 +0100[diff] [blame]2# Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Chandni Cherukurid61a7052018-08-01 15:58:48 +0530[diff] [blame]7CSS_USE_SCMI_SDS_DRIVER := 1
8
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]9CSS_ENT_BASE := plat/arm/css/sgi
10
Manish Pandeyd419e222023-02-13 12:39:17 +0000[diff] [blame^]11ENABLE_FEAT_RAS := 1
12
13RAS_FFH_SUPPORT := 0
Sughosh Ganu3f7e79d2018-05-16 18:48:56 +0530[diff] [blame]14
Sughosh Ganu3f7e79d2018-05-16 18:48:56 +0530[diff] [blame]15SDEI_SUPPORT := 0
16
17EL3_EXCEPTION_HANDLING := 0
18
Manish Pandey0e3379d2022-10-10 11:43:08 +0100[diff] [blame]19HANDLE_EA_EL3_FIRST_NS := 0
Sughosh Ganu3f7e79d2018-05-16 18:48:56 +0530[diff] [blame]20
Vijayenthiran Subramaniambc489912019-12-26 17:45:58 +0530[diff] [blame]21CSS_SGI_CHIP_COUNT := 1
22
Aditya Angadi06402222021-03-20 12:06:15 +0530[diff] [blame]23CSS_SGI_PLATFORM_VARIANT := 0
24
Vijayenthiran Subramaniam063bb732021-11-25 21:54:30 +0530[diff] [blame]25# Do not enable SVE
26ENABLE_SVE_FOR_NS := 0
27
Nishant Sharma469a6f62022-04-19 10:23:59 +0100[diff] [blame]28CTX_INCLUDE_FPREGS := 1
29
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]30INTERCONNECT_SOURCES := ${CSS_ENT_BASE}/sgi_interconnect.c
31
32PLAT_INCLUDES += -I${CSS_ENT_BASE}/include
33
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000[diff] [blame]34# GIC-600 configuration
Andre Przywarae1cc1302020-03-25 15:50:38 +0000[diff] [blame]35GICV3_SUPPORT_GIC600 := 1
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000[diff] [blame]36
37# Include GICv3 driver files
38include drivers/arm/gic/v3/gicv3.mk
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]39
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000[diff] [blame]40ENT_GIC_SOURCES := ${GICV3_SOURCES} \
41 plat/common/plat_gicv3.c \
42 plat/arm/common/arm_gicv3.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]43
Aditya Angadi502d0ac2020-11-18 08:27:15 +0530[diff] [blame]44PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/aarch64/sgi_helper.S
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]45
Aditya Angadi20b48412019-04-16 11:29:14 +0530[diff] [blame]46BL1_SOURCES += ${INTERCONNECT_SOURCES} \
47 drivers/arm/sbsa/sbsa.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]48
Nishant Sharma289f7822021-11-30 09:31:48 +0000[diff] [blame]49BL2_SOURCES += ${CSS_ENT_BASE}/sgi_image_load.c \
50 drivers/arm/css/sds/sds.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]51
Chandni Cherukuria3f66132018-08-10 11:17:58 +0530[diff] [blame]52BL31_SOURCES += ${INTERCONNECT_SOURCES} \
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]53 ${ENT_GIC_SOURCES} \
54 ${CSS_ENT_BASE}/sgi_bl31_setup.c \
Chandni Cherukuria5d44ec2018-08-14 15:25:34 +0530[diff] [blame]55 ${CSS_ENT_BASE}/sgi_topology.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]56
Manish Pandeyd419e222023-02-13 12:39:17 +0000[diff] [blame^]57ifeq (${RAS_FFH_SUPPORT},1)
Sughosh Ganu18f513d2018-05-16 17:22:35 +0530[diff] [blame]58BL31_SOURCES += ${CSS_ENT_BASE}/sgi_ras.c
59endif
60
Deepak Pandeyb0971f92018-05-25 12:43:30 +0530[diff] [blame]61ifneq (${RESET_TO_BL31},0)
Sandrine Bailleux1e32d322019-01-07 15:35:37 +0100[diff] [blame]62 $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \
Deepak Pandeyb0971f92018-05-25 12:43:30 +0530[diff] [blame]63 Please set RESET_TO_BL31 to 0.")
64endif
65
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]66$(eval $(call add_define,SGI_PLAT))
67
Vijayenthiran Subramaniambc489912019-12-26 17:45:58 +0530[diff] [blame]68$(eval $(call add_define,CSS_SGI_CHIP_COUNT))
69
Aditya Angadi06402222021-03-20 12:06:15 +0530[diff] [blame]70$(eval $(call add_define,CSS_SGI_PLATFORM_VARIANT))
71
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]72override CSS_LOAD_SCP_IMAGES := 0
73override NEED_BL2U := no
Sudipto Paulc4510102018-04-16 17:46:50 +0530[diff] [blame]74override ARM_PLAT_MT := 1
Pranav Madhu4c474322021-04-20 12:01:46 +0530[diff] [blame]75override PSCI_EXTENDED_STATE_ID := 1
76override ARM_RECOM_STATE_ID_ENC := 1
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]77
78# System coherency is managed in hardware
79HW_ASSISTED_COHERENCY := 1
80
81# When building for systems with hardware-assisted coherency, there's no need to
82# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
83USE_COHERENT_MEM := 0
84
85include plat/arm/common/arm_common.mk
86include plat/arm/css/common/css_common.mk
87include plat/arm/soc/common/soc_css.mk
88include plat/arm/board/common/board_common.mk