Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 31 | #include <arch.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 32 | #include <arch_helpers.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 33 | #include <assert.h> |
Juan Castillo | a08a5e7 | 2015-05-19 11:54:12 +0100 | [diff] [blame] | 34 | #include <auth_mod.h> |
Yatharth Kochar | 71c9a5e | 2015-10-10 19:06:53 +0100 | [diff] [blame] | 35 | #include <bl1.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 36 | #include <bl_common.h> |
Antonio Nino Diaz | e3962d0 | 2017-02-16 16:17:19 +0000 | [diff] [blame] | 37 | #include <console.h> |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 38 | #include <debug.h> |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 39 | #include <errata_report.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 40 | #include <platform.h> |
Dan Handley | ed6ff95 | 2014-05-14 17:44:19 +0100 | [diff] [blame] | 41 | #include <platform_def.h> |
Yatharth Kochar | 71c9a5e | 2015-10-10 19:06:53 +0100 | [diff] [blame] | 42 | #include <smcc_helpers.h> |
Soby Mathew | c53ac5e | 2016-07-20 14:38:36 +0100 | [diff] [blame] | 43 | #include <utils.h> |
Dan Handley | bcd60ba | 2014-04-17 18:53:42 +0100 | [diff] [blame] | 44 | #include "bl1_private.h" |
Yatharth Kochar | 71c9a5e | 2015-10-10 19:06:53 +0100 | [diff] [blame] | 45 | #include <uuid.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 46 | |
Yatharth Kochar | 71c9a5e | 2015-10-10 19:06:53 +0100 | [diff] [blame] | 47 | /* BL1 Service UUID */ |
| 48 | DEFINE_SVC_UUID(bl1_svc_uid, |
| 49 | 0xfd3967d4, 0x72cb, 0x4d9a, 0xb5, 0x75, |
| 50 | 0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a); |
| 51 | |
Vikram Kanigiri | a3a5e4a | 2014-05-15 18:27:15 +0100 | [diff] [blame] | 52 | |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 53 | static void bl1_load_bl2(void); |
Vikram Kanigiri | a3a5e4a | 2014-05-15 18:27:15 +0100 | [diff] [blame] | 54 | |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 55 | /******************************************************************************* |
| 56 | * The next function has a weak definition. Platform specific code can override |
| 57 | * it if it wishes to. |
| 58 | ******************************************************************************/ |
| 59 | #pragma weak bl1_init_bl2_mem_layout |
Vikram Kanigiri | a3a5e4a | 2014-05-15 18:27:15 +0100 | [diff] [blame] | 60 | |
| 61 | /******************************************************************************* |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 62 | * Function that takes a memory layout into which BL2 has been loaded and |
| 63 | * populates a new memory layout for BL2 that ensures that BL1's data sections |
| 64 | * resident in secure RAM are not visible to BL2. |
| 65 | ******************************************************************************/ |
| 66 | void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout, |
| 67 | meminfo_t *bl2_mem_layout) |
| 68 | { |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 69 | |
| 70 | assert(bl1_mem_layout != NULL); |
| 71 | assert(bl2_mem_layout != NULL); |
| 72 | |
Yatharth Kochar | 51f76f6 | 2016-09-12 16:10:33 +0100 | [diff] [blame] | 73 | #if LOAD_IMAGE_V2 |
| 74 | /* |
| 75 | * Remove BL1 RW data from the scope of memory visible to BL2. |
| 76 | * This is assuming BL1 RW data is at the top of bl1_mem_layout. |
| 77 | */ |
| 78 | assert(BL1_RW_BASE > bl1_mem_layout->total_base); |
| 79 | bl2_mem_layout->total_base = bl1_mem_layout->total_base; |
| 80 | bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base; |
| 81 | #else |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 82 | /* Check that BL1's memory is lying outside of the free memory */ |
| 83 | assert((BL1_RAM_LIMIT <= bl1_mem_layout->free_base) || |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 84 | (BL1_RAM_BASE >= bl1_mem_layout->free_base + |
| 85 | bl1_mem_layout->free_size)); |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 86 | |
| 87 | /* Remove BL1 RW data from the scope of memory visible to BL2 */ |
| 88 | *bl2_mem_layout = *bl1_mem_layout; |
| 89 | reserve_mem(&bl2_mem_layout->total_base, |
| 90 | &bl2_mem_layout->total_size, |
| 91 | BL1_RAM_BASE, |
Yatharth Kochar | 51f76f6 | 2016-09-12 16:10:33 +0100 | [diff] [blame] | 92 | BL1_RAM_LIMIT - BL1_RAM_BASE); |
| 93 | #endif /* LOAD_IMAGE_V2 */ |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 94 | |
| 95 | flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t)); |
| 96 | } |
| 97 | |
| 98 | /******************************************************************************* |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 99 | * Function to perform late architectural and platform specific initialization. |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 100 | * It also queries the platform to load and run next BL image. Only called |
| 101 | * by the primary cpu after a cold boot. |
| 102 | ******************************************************************************/ |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 103 | void bl1_main(void) |
| 104 | { |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 105 | unsigned int image_id; |
| 106 | |
Dan Handley | 91b624e | 2014-07-29 17:14:00 +0100 | [diff] [blame] | 107 | /* Announce our arrival */ |
| 108 | NOTICE(FIRMWARE_WELCOME_STR); |
| 109 | NOTICE("BL1: %s\n", version_string); |
| 110 | NOTICE("BL1: %s\n", build_message); |
| 111 | |
Yatharth Kochar | 5d36121 | 2016-06-28 17:07:09 +0100 | [diff] [blame] | 112 | INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, |
| 113 | (void *)BL1_RAM_LIMIT); |
Dan Handley | 91b624e | 2014-07-29 17:14:00 +0100 | [diff] [blame] | 114 | |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 115 | print_errata_status(); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 116 | |
Antonio Nino Diaz | 3759e3f | 2017-03-22 15:48:51 +0000 | [diff] [blame] | 117 | #if ENABLE_ASSERTIONS |
Yatharth Kochar | 5d36121 | 2016-06-28 17:07:09 +0100 | [diff] [blame] | 118 | u_register_t val; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 119 | /* |
| 120 | * Ensure that MMU/Caches and coherency are turned on |
| 121 | */ |
Yatharth Kochar | 5d36121 | 2016-06-28 17:07:09 +0100 | [diff] [blame] | 122 | #ifdef AARCH32 |
| 123 | val = read_sctlr(); |
| 124 | #else |
Dan Handley | 0cdebbd | 2015-03-30 17:15:16 +0100 | [diff] [blame] | 125 | val = read_sctlr_el3(); |
Yatharth Kochar | 5d36121 | 2016-06-28 17:07:09 +0100 | [diff] [blame] | 126 | #endif |
Andrew Thoelke | 5e287b5 | 2015-06-11 14:12:14 +0100 | [diff] [blame] | 127 | assert(val & SCTLR_M_BIT); |
| 128 | assert(val & SCTLR_C_BIT); |
| 129 | assert(val & SCTLR_I_BIT); |
Dan Handley | 0cdebbd | 2015-03-30 17:15:16 +0100 | [diff] [blame] | 130 | /* |
| 131 | * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the |
| 132 | * provided platform value |
| 133 | */ |
| 134 | val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; |
| 135 | /* |
| 136 | * If CWG is zero, then no CWG information is available but we can |
| 137 | * at least check the platform value is less than the architectural |
| 138 | * maximum. |
| 139 | */ |
| 140 | if (val != 0) |
| 141 | assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); |
| 142 | else |
| 143 | assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); |
Antonio Nino Diaz | 3759e3f | 2017-03-22 15:48:51 +0000 | [diff] [blame] | 144 | #endif /* ENABLE_ASSERTIONS */ |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 145 | |
| 146 | /* Perform remaining generic architectural setup from EL3 */ |
| 147 | bl1_arch_setup(); |
| 148 | |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 149 | #if TRUSTED_BOARD_BOOT |
| 150 | /* Initialize authentication module */ |
| 151 | auth_mod_init(); |
| 152 | #endif /* TRUSTED_BOARD_BOOT */ |
| 153 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 154 | /* Perform platform setup in BL1. */ |
| 155 | bl1_platform_setup(); |
| 156 | |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 157 | /* Get the image id of next image to load and run. */ |
| 158 | image_id = bl1_plat_get_next_image_id(); |
| 159 | |
Yatharth Kochar | 71c9a5e | 2015-10-10 19:06:53 +0100 | [diff] [blame] | 160 | /* |
| 161 | * We currently interpret any image id other than |
| 162 | * BL2_IMAGE_ID as the start of firmware update. |
| 163 | */ |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 164 | if (image_id == BL2_IMAGE_ID) |
| 165 | bl1_load_bl2(); |
Yatharth Kochar | 71c9a5e | 2015-10-10 19:06:53 +0100 | [diff] [blame] | 166 | else |
| 167 | NOTICE("BL1-FWU: *******FWU Process Started*******\n"); |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 168 | |
| 169 | bl1_prepare_next_image(image_id); |
Antonio Nino Diaz | e3962d0 | 2017-02-16 16:17:19 +0000 | [diff] [blame] | 170 | |
| 171 | console_flush(); |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 172 | } |
| 173 | |
| 174 | /******************************************************************************* |
| 175 | * This function locates and loads the BL2 raw binary image in the trusted SRAM. |
| 176 | * Called by the primary cpu after a cold boot. |
| 177 | * TODO: Add support for alternative image load mechanism e.g using virtio/elf |
| 178 | * loader etc. |
| 179 | ******************************************************************************/ |
| 180 | void bl1_load_bl2(void) |
| 181 | { |
| 182 | image_desc_t *image_desc; |
| 183 | image_info_t *image_info; |
| 184 | entry_point_info_t *ep_info; |
| 185 | meminfo_t *bl1_tzram_layout; |
| 186 | meminfo_t *bl2_tzram_layout; |
| 187 | int err; |
| 188 | |
| 189 | /* Get the image descriptor */ |
| 190 | image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); |
| 191 | assert(image_desc); |
| 192 | |
| 193 | /* Get the image info */ |
| 194 | image_info = &image_desc->image_info; |
| 195 | |
| 196 | /* Get the entry point info */ |
| 197 | ep_info = &image_desc->ep_info; |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 198 | |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 199 | /* Find out how much free trusted ram remains after BL1 load */ |
Sandrine Bailleux | ee12f6f | 2013-11-28 14:55:58 +0000 | [diff] [blame] | 200 | bl1_tzram_layout = bl1_plat_sec_mem_layout(); |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 201 | |
Juan Castillo | 3a66aca | 2015-04-13 17:36:19 +0100 | [diff] [blame] | 202 | INFO("BL1: Loading BL2\n"); |
| 203 | |
Yatharth Kochar | 51f76f6 | 2016-09-12 16:10:33 +0100 | [diff] [blame] | 204 | #if LOAD_IMAGE_V2 |
| 205 | err = load_auth_image(BL2_IMAGE_ID, image_info); |
| 206 | #else |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 207 | /* Load the BL2 image */ |
Juan Castillo | a08a5e7 | 2015-05-19 11:54:12 +0100 | [diff] [blame] | 208 | err = load_auth_image(bl1_tzram_layout, |
Juan Castillo | 3a66aca | 2015-04-13 17:36:19 +0100 | [diff] [blame] | 209 | BL2_IMAGE_ID, |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 210 | image_info->image_base, |
| 211 | image_info, |
| 212 | ep_info); |
Juan Castillo | a08a5e7 | 2015-05-19 11:54:12 +0100 | [diff] [blame] | 213 | |
Yatharth Kochar | 51f76f6 | 2016-09-12 16:10:33 +0100 | [diff] [blame] | 214 | #endif /* LOAD_IMAGE_V2 */ |
| 215 | |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 216 | if (err) { |
Dan Handley | 91b624e | 2014-07-29 17:14:00 +0100 | [diff] [blame] | 217 | ERROR("Failed to load BL2 firmware.\n"); |
Juan Castillo | 26ae583 | 2015-09-25 15:41:14 +0100 | [diff] [blame] | 218 | plat_error_handler(err); |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 219 | } |
Juan Castillo | d227d8b | 2015-01-07 13:49:59 +0000 | [diff] [blame] | 220 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 221 | /* |
| 222 | * Create a new layout of memory for BL2 as seen by BL1 i.e. |
| 223 | * tell it the amount of total and free memory available. |
| 224 | * This layout is created at the first free address visible |
| 225 | * to BL2. BL2 will read the memory layout before using its |
| 226 | * memory for other purposes. |
| 227 | */ |
Yatharth Kochar | 51f76f6 | 2016-09-12 16:10:33 +0100 | [diff] [blame] | 228 | #if LOAD_IMAGE_V2 |
| 229 | bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->total_base; |
| 230 | #else |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 231 | bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base; |
Yatharth Kochar | 51f76f6 | 2016-09-12 16:10:33 +0100 | [diff] [blame] | 232 | #endif /* LOAD_IMAGE_V2 */ |
| 233 | |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 234 | bl1_init_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 235 | |
Yatharth Kochar | 5d36121 | 2016-06-28 17:07:09 +0100 | [diff] [blame] | 236 | ep_info->args.arg1 = (uintptr_t)bl2_tzram_layout; |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame] | 237 | NOTICE("BL1: Booting BL2\n"); |
Yatharth Kochar | 5d36121 | 2016-06-28 17:07:09 +0100 | [diff] [blame] | 238 | VERBOSE("BL1: BL2 memory layout address = %p\n", |
| 239 | (void *) bl2_tzram_layout); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 240 | } |
| 241 | |
| 242 | /******************************************************************************* |
Yatharth Kochar | 5d36121 | 2016-06-28 17:07:09 +0100 | [diff] [blame] | 243 | * Function called just before handing over to the next BL to inform the user |
| 244 | * about the boot progress. In debug mode, also print details about the BL |
| 245 | * image's execution context. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 246 | ******************************************************************************/ |
Yatharth Kochar | 5d36121 | 2016-06-28 17:07:09 +0100 | [diff] [blame] | 247 | void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 248 | { |
Yatharth Kochar | 5d36121 | 2016-06-28 17:07:09 +0100 | [diff] [blame] | 249 | #ifdef AARCH32 |
| 250 | NOTICE("BL1: Booting BL32\n"); |
| 251 | #else |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 252 | NOTICE("BL1: Booting BL31\n"); |
Yatharth Kochar | 5d36121 | 2016-06-28 17:07:09 +0100 | [diff] [blame] | 253 | #endif /* AARCH32 */ |
| 254 | print_entry_point_info(bl_ep_info); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 255 | } |
Sandrine Bailleux | b7e97c4 | 2015-11-10 10:01:19 +0000 | [diff] [blame] | 256 | |
| 257 | #if SPIN_ON_BL1_EXIT |
| 258 | void print_debug_loop_message(void) |
| 259 | { |
| 260 | NOTICE("BL1: Debug loop, spinning forever\n"); |
| 261 | NOTICE("BL1: Please connect the debugger to continue\n"); |
| 262 | } |
| 263 | #endif |
Yatharth Kochar | 71c9a5e | 2015-10-10 19:06:53 +0100 | [diff] [blame] | 264 | |
| 265 | /******************************************************************************* |
| 266 | * Top level handler for servicing BL1 SMCs. |
| 267 | ******************************************************************************/ |
| 268 | register_t bl1_smc_handler(unsigned int smc_fid, |
| 269 | register_t x1, |
| 270 | register_t x2, |
| 271 | register_t x3, |
| 272 | register_t x4, |
| 273 | void *cookie, |
| 274 | void *handle, |
| 275 | unsigned int flags) |
| 276 | { |
| 277 | |
| 278 | #if TRUSTED_BOARD_BOOT |
| 279 | /* |
| 280 | * Dispatch FWU calls to FWU SMC handler and return its return |
| 281 | * value |
| 282 | */ |
| 283 | if (is_fwu_fid(smc_fid)) { |
| 284 | return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie, |
| 285 | handle, flags); |
| 286 | } |
| 287 | #endif |
| 288 | |
| 289 | switch (smc_fid) { |
| 290 | case BL1_SMC_CALL_COUNT: |
| 291 | SMC_RET1(handle, BL1_NUM_SMC_CALLS); |
| 292 | |
| 293 | case BL1_SMC_UID: |
| 294 | SMC_UUID_RET(handle, bl1_svc_uid); |
| 295 | |
| 296 | case BL1_SMC_VERSION: |
| 297 | SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER); |
| 298 | |
| 299 | default: |
| 300 | break; |
| 301 | } |
| 302 | |
| 303 | WARN("Unimplemented BL1 SMC Call: 0x%x \n", smc_fid); |
| 304 | SMC_RET1(handle, SMC_UNK); |
| 305 | } |