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git01.mediatek.com / filogic / atf / 7c14ceaf3c578d34d45ac34307f5fbfe3d509b46 / . / plat / intel / soc / agilex / platform.mk
blob: 21cc6a3c0cb08dbafddde437bf0dd806a3fb22a9 [file] [log] [blame]
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]1#
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600[diff] [blame]2# Copyright (c) 2019-2023, ARM Limited and Contributors. All rights reserved.
Sieu Mun Tang6848bd62024-07-20 00:43:43 +0800[diff] [blame]3# Copyright (c) 2019-2023, Intel Corporation. All rights reserved.
4# Copyright (c) 2024, Altera Corporation. All rights reserved.
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]5#
6# SPDX-License-Identifier: BSD-3-Clause
7#
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]8
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]9PLAT_INCLUDES := \
10 -Iplat/intel/soc/agilex/include/ \
Hadi Asyrafi309ac012019-08-01 14:48:39 +0800[diff] [blame]11 -Iplat/intel/soc/common/drivers/ \
12 -Iplat/intel/soc/common/include/
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]13
Abdul Halim, Muhammad Hadi Asyrafi0ae8d9a2020-08-19 14:50:01 +0800[diff] [blame]14# Include GICv2 driver files
15include drivers/arm/gic/v2/gicv2.mk
16AGX_GICv2_SOURCES := \
17 ${GICV2_SOURCES} \
18 plat/common/plat_gicv2.c
19
20
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]21PLAT_BL_COMMON_SOURCES := \
Abdul Halim, Muhammad Hadi Asyrafi0ae8d9a2020-08-19 14:50:01 +0800[diff] [blame]22 ${AGX_GICv2_SOURCES} \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]23 drivers/delay_timer/delay_timer.c \
24 drivers/delay_timer/generic_delay_timer.c \
25 drivers/ti/uart/aarch64/16550_console.S \
26 lib/xlat_tables/aarch64/xlat_tables.c \
27 lib/xlat_tables/xlat_tables_common.c \
Hadi Asyrafi309ac012019-08-01 14:48:39 +0800[diff] [blame]28 plat/intel/soc/common/aarch64/platform_common.c \
Chee Hong Ang64740962020-05-11 00:55:01 +0800[diff] [blame]29 plat/intel/soc/common/aarch64/plat_helpers.S \
Abdul Halim, Muhammad Hadi Asyrafi2f94ca42020-08-05 22:40:46 +0800[diff] [blame]30 plat/intel/soc/common/drivers/ccu/ncore_ccu.c \
Sieu Mun Tang6848bd62024-07-20 00:43:43 +0800[diff] [blame]31 plat/intel/soc/common/lib/sha/sha.c \
Chee Hong Ang64740962020-05-11 00:55:01 +0800[diff] [blame]32 plat/intel/soc/common/socfpga_delay_timer.c
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]33
34BL2_SOURCES += \
35 common/desc_image_load.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]36 drivers/mmc/mmc.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]37 drivers/intel/soc/stratix10/io/s10_memmap_qspi.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]38 drivers/io/io_storage.c \
39 drivers/io/io_block.c \
40 drivers/io/io_fip.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]41 drivers/partition/partition.c \
42 drivers/partition/gpt.c \
43 drivers/synopsys/emmc/dw_mmc.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]44 lib/cpus/aarch64/cortex_a53.S \
45 plat/intel/soc/agilex/bl2_plat_setup.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]46 plat/intel/soc/agilex/soc/agilex_clock_manager.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]47 plat/intel/soc/agilex/soc/agilex_memory_controller.c \
Tien Hock Lohfcbc33d2020-05-11 01:11:39 -0700[diff] [blame]48 plat/intel/soc/agilex/soc/agilex_mmc.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]49 plat/intel/soc/agilex/soc/agilex_pinmux.c \
BenjaminLimJLa4a43272022-04-06 10:19:16 +0800[diff] [blame]50 plat/intel/soc/common/bl2_plat_mem_params_desc.c \
Hadi Asyrafi6a240c72019-08-01 15:21:20 +0800[diff] [blame]51 plat/intel/soc/common/socfpga_image_load.c \
Mahesh Raoc2715992023-08-22 17:26:23 +0800[diff] [blame]52 plat/intel/soc/common/socfpga_ros.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]53 plat/intel/soc/common/socfpga_storage.c \
Sieu Mun Tang6848bd62024-07-20 00:43:43 +0800[diff] [blame]54 plat/intel/soc/common/socfpga_vab.c \
Tien Hock, Loh8d9e8912019-10-02 13:49:25 +0800[diff] [blame]55 plat/intel/soc/common/soc/socfpga_emac.c \
Abdul Halim, Muhammad Hadi Asyrafi1205ef02020-08-06 10:21:54 +0800[diff] [blame]56 plat/intel/soc/common/soc/socfpga_firewall.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]57 plat/intel/soc/common/soc/socfpga_handoff.c \
Hadi Asyrafi6f8a2b22019-10-23 18:34:14 +0800[diff] [blame]58 plat/intel/soc/common/soc/socfpga_mailbox.c \
Hadi Asyrafi67cb0ea2019-12-23 13:25:33 +0800[diff] [blame]59 plat/intel/soc/common/soc/socfpga_reset_manager.c \
Jit Loon Lim477aef42023-08-14 13:12:01 +0800[diff] [blame]60 plat/intel/soc/common/drivers/ddr/ddr.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]61 plat/intel/soc/common/drivers/qspi/cadence_qspi.c \
Abdul Halim, Muhammad Hadi Asyrafi2f94ca42020-08-05 22:40:46 +0800[diff] [blame]62 plat/intel/soc/common/drivers/wdt/watchdog.c
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]63
Rohit Nerdc2daae2022-05-11 03:15:40 -0700[diff] [blame]64include lib/zlib/zlib.mk
65PLAT_INCLUDES += -Ilib/zlib
66BL2_SOURCES += $(ZLIB_SOURCES)
67
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]68BL31_SOURCES += \
69 drivers/arm/cci/cci.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]70 lib/cpus/aarch64/aem_generic.S \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]71 lib/cpus/aarch64/cortex_a53.S \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]72 plat/common/plat_psci_common.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]73 plat/intel/soc/agilex/bl31_plat_setup.c \
BenjaminLimJLa4a43272022-04-06 10:19:16 +0800[diff] [blame]74 plat/intel/soc/agilex/soc/agilex_clock_manager.c \
Hadi Asyrafi4d9f3952019-10-23 17:35:32 +0800[diff] [blame]75 plat/intel/soc/common/socfpga_psci.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]76 plat/intel/soc/common/socfpga_sip_svc.c \
Sieu Mun Tang044ed482022-05-11 10:45:19 +0800[diff] [blame]77 plat/intel/soc/common/socfpga_sip_svc_v2.c \
Hadi Asyrafi6a240c72019-08-01 15:21:20 +0800[diff] [blame]78 plat/intel/soc/common/socfpga_topology.c \
Sieu Mun Tangdbcc2cf2022-03-07 12:13:04 +0800[diff] [blame]79 plat/intel/soc/common/sip/socfpga_sip_ecc.c \
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +0800[diff] [blame]80 plat/intel/soc/common/sip/socfpga_sip_fcs.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]81 plat/intel/soc/common/soc/socfpga_mailbox.c \
Hadi Asyrafi36a9f302019-12-24 10:42:52 +0800[diff] [blame]82 plat/intel/soc/common/soc/socfpga_reset_manager.c
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]83
Sieu Mun Tang6848bd62024-07-20 00:43:43 +0800[diff] [blame]84# Don't have the Linux kernel as a BL33 image by default
85ARM_LINUX_KERNEL_AS_BL33 := 0
86$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
87$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
Jit Loon Limc5a3e3a2023-10-16 00:19:34 +0800[diff] [blame]88$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
89
Sieu Mun Tang6848bd62024-07-20 00:43:43 +0800[diff] [blame]90# Configs for VAB Authentication
91SOCFPGA_SECURE_VAB_AUTH := 0
92$(eval $(call assert_boolean,SOCFPGA_SECURE_VAB_AUTH))
93$(eval $(call add_define,SOCFPGA_SECURE_VAB_AUTH))
94
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]95PROGRAMMABLE_RESET_ADDRESS := 0
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600[diff] [blame]96RESET_TO_BL2 := 1
Hadi Asyrafi461f8f42019-08-20 15:33:27 +0800[diff] [blame]97BL2_INV_DCACHE := 0
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]98USE_COHERENT_MEM := 1
Sieu Mun Tang6848bd62024-07-20 00:43:43 +0800[diff] [blame]99
100HANDLE_EA_EL3_FIRST_NS := 1