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Varun Wadekar3d4e6a52015-03-13 14:01:03 +05301/*
Daniel Boulby8942a1b2018-06-22 14:16:03 +01002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Varun Wadekar3d4e6a52015-03-13 14:01:03 +05303 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Varun Wadekar3d4e6a52015-03-13 14:01:03 +05305 */
6
Varun Wadekar3d4e6a52015-03-13 14:01:03 +05307#include <assert.h>
Varun Wadekar3d4e6a52015-03-13 14:01:03 +05308#include <string.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009
10#include <arch_helpers.h>
11#include <common/bl_common.h>
12#include <lib/el3_runtime/context_mgmt.h>
13
Varun Wadekar3d4e6a52015-03-13 14:01:03 +053014#include "tlkd_private.h"
15
Varun Wadekar97625e32015-03-13 14:59:03 +053016#define AT_MASK 3
17
18/*******************************************************************************
19 * This function helps the SP to translate NS/S virtual addresses.
20 ******************************************************************************/
21uint64_t tlkd_va_translate(uintptr_t va, int type)
22{
23 uint64_t pa;
24
25 if (type & TLK_TRANSLATE_NS_VADDR) {
26
27 /* save secure context */
28 cm_el1_sysregs_context_save(SECURE);
29
30 /* restore non-secure context */
31 cm_el1_sysregs_context_restore(NON_SECURE);
32
33 /* switch NS bit to start using 64-bit, non-secure mappings */
34 write_scr(cm_get_scr_el3(NON_SECURE));
35 isb();
36 }
37
38 int at = type & AT_MASK;
39 switch (at) {
40 case 0:
Manish V Badarkhebde5c952020-07-14 14:43:12 +010041 AT(ats12e1r, va);
Varun Wadekar97625e32015-03-13 14:59:03 +053042 break;
43 case 1:
Manish V Badarkhebde5c952020-07-14 14:43:12 +010044 AT(ats12e1w, va);
Varun Wadekar97625e32015-03-13 14:59:03 +053045 break;
46 case 2:
Manish V Badarkhebde5c952020-07-14 14:43:12 +010047 AT(ats12e0r, va);
Varun Wadekar97625e32015-03-13 14:59:03 +053048 break;
49 case 3:
Manish V Badarkhebde5c952020-07-14 14:43:12 +010050 AT(ats12e0w, va);
Varun Wadekar97625e32015-03-13 14:59:03 +053051 break;
52 default:
Daniel Boulby8942a1b2018-06-22 14:16:03 +010053 assert(0); /* Unreachable */
Jonathan Wright75a5d8b2018-03-14 15:56:21 +000054 break;
Varun Wadekar97625e32015-03-13 14:59:03 +053055 }
56
57 /* get the (NS/S) physical address */
58 isb();
59 pa = read_par_el1();
60
61 /* Restore secure state */
62 if (type & TLK_TRANSLATE_NS_VADDR) {
63
64 /* restore secure context */
65 cm_el1_sysregs_context_restore(SECURE);
66
67 /* switch NS bit to start using 32-bit, secure mappings */
68 write_scr(cm_get_scr_el3(SECURE));
69 isb();
70 }
71
72 return pa;
73}
74
Varun Wadekar3d4e6a52015-03-13 14:01:03 +053075/*******************************************************************************
76 * Given a secure payload entrypoint, register width, cpu id & pointer to a
77 * context data structure, this function will create a secure context ready for
78 * programming an entry into the secure payload.
79 ******************************************************************************/
80void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point,
81 uint32_t rw,
82 uint64_t pc,
83 tlk_context_t *tlk_ctx)
84{
85 uint32_t ep_attr, spsr;
86
87 /* Passing a NULL context is a critical programming error */
88 assert(tlk_ctx);
89 assert(tlk_entry_point);
90 assert(pc);
91
92 /* Associate this context with the cpu specified */
93 tlk_ctx->mpidr = read_mpidr_el1();
David Cunadoc8833ea2017-04-16 17:15:08 +010094 clr_yield_smc_active_flag(tlk_ctx->state);
Varun Wadekar3d4e6a52015-03-13 14:01:03 +053095 cm_set_context(&tlk_ctx->cpu_ctx, SECURE);
96
97 if (rw == SP_AARCH64)
98 spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
99 else
100 spsr = SPSR_MODE32(MODE32_svc,
101 SPSR_T_ARM,
102 read_sctlr_el3() & SCTLR_EE_BIT,
103 DISABLE_ALL_EXCEPTIONS);
104
105 /* initialise an entrypoint to set up the CPU context */
106 ep_attr = SECURE | EP_ST_ENABLE;
107 if (read_sctlr_el3() & SCTLR_EE_BIT)
108 ep_attr |= EP_EE_BIG;
109 SET_PARAM_HEAD(tlk_entry_point, PARAM_EP, VERSION_1, ep_attr);
110
111 tlk_entry_point->pc = pc;
112 tlk_entry_point->spsr = spsr;
113}
114
115/*******************************************************************************
116 * This function takes a TLK context pointer and:
117 * 1. Applies the S-EL1 system register context from tlk_ctx->cpu_ctx.
118 * 2. Saves the current C runtime state (callee saved registers) on the stack
119 * frame and saves a reference to this state.
120 * 3. Calls el3_exit() so that the EL3 system and general purpose registers
121 * from the tlk_ctx->cpu_ctx are used to enter the secure payload image.
122 ******************************************************************************/
123uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx)
124{
125 uint64_t rc;
126
127 /* Passing a NULL context is a critical programming error */
128 assert(tlk_ctx);
Varun Wadekar3d4e6a52015-03-13 14:01:03 +0530129
130 /* Apply the Secure EL1 system register context and switch to it */
131 assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx);
132 cm_el1_sysregs_context_restore(SECURE);
133 cm_set_next_eret_context(SECURE);
134
135 rc = tlkd_enter_sp(&tlk_ctx->c_rt_ctx);
Antonio Nino Diaz0fbaa5c2017-10-19 16:55:48 +0100136#if ENABLE_ASSERTIONS
Varun Wadekar3d4e6a52015-03-13 14:01:03 +0530137 tlk_ctx->c_rt_ctx = 0;
138#endif
139
140 return rc;
141}
142
143/*******************************************************************************
144 * This function takes a TLK context pointer and:
145 * 1. Saves the S-EL1 system register context to tlk_ctx->cpu_ctx.
146 * 2. Restores the current C runtime state (callee saved registers) from the
147 * stack frame using reference to this state saved in tlkd_enter_sp().
148 * 3. It does not need to save any general purpose or EL3 system register state
149 * as the generic smc entry routine should have saved those.
150 ******************************************************************************/
151void tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx, uint64_t ret)
152{
153 /* Passing a NULL context is a critical programming error */
154 assert(tlk_ctx);
155
156 /* Save the Secure EL1 system register context */
157 assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx);
158 cm_el1_sysregs_context_save(SECURE);
159
160 assert(tlk_ctx->c_rt_ctx != 0);
161 tlkd_exit_sp(tlk_ctx->c_rt_ctx, ret);
162
163 /* Should never reach here */
164 assert(0);
165}