blob: 6b1f1608c76bd872b917544a5bed734bbe983fd2 [file] [log] [blame]
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +08001/*
2 * Copyright (c) 2020-2022, Intel Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef SOCFPGA_FCS_H
8#define SOCFPGA_FCS_H
9
10/* FCS Definitions */
11
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080012#define FCS_RANDOM_WORD_SIZE 8U
13#define FCS_PROV_DATA_WORD_SIZE 44U
14#define FCS_SHA384_WORD_SIZE 12U
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +080015
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080016#define FCS_RANDOM_BYTE_SIZE (FCS_RANDOM_WORD_SIZE * 4U)
17#define FCS_RANDOM_EXT_MAX_WORD_SIZE 1020U
18#define FCS_PROV_DATA_BYTE_SIZE (FCS_PROV_DATA_WORD_SIZE * 4U)
19#define FCS_SHA384_BYTE_SIZE (FCS_SHA384_WORD_SIZE * 4U)
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +080020
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080021#define FCS_RANDOM_EXT_OFFSET 3
Sieu Mun Tange7a037f2022-05-10 17:18:19 +080022
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080023#define FCS_MODE_DECRYPT 0x0
24#define FCS_MODE_ENCRYPT 0x1
25#define FCS_ENCRYPTION_DATA_0 0x10100
26#define FCS_DECRYPTION_DATA_0 0x10102
27#define FCS_OWNER_ID_OFFSET 0xC
28#define FCS_CRYPTION_CRYPTO_HEADER 0x07000000
29#define FCS_CRYPTION_RESP_WORD_SIZE 4U
30#define FCS_CRYPTION_RESP_SIZE_OFFSET 3U
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +080031
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080032#define PSGSIGMA_TEARDOWN_MAGIC 0xB852E2A4
33#define PSGSIGMA_SESSION_ID_ONE 0x1
34#define PSGSIGMA_UNKNOWN_SESSION 0xFFFFFFFF
Sieu Mun Tang2a820b92022-05-11 09:59:55 +080035
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080036#define RESERVED_AS_ZERO 0x0
Sieu Mun Tanga068fdf2022-05-11 10:01:54 +080037/* FCS Single cert */
38
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080039#define FCS_BIG_CNTR_SEL 0x1
Sieu Mun Tanga068fdf2022-05-11 10:01:54 +080040
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080041#define FCS_SVN_CNTR_0_SEL 0x2
42#define FCS_SVN_CNTR_1_SEL 0x3
43#define FCS_SVN_CNTR_2_SEL 0x4
44#define FCS_SVN_CNTR_3_SEL 0x5
Sieu Mun Tanga068fdf2022-05-11 10:01:54 +080045
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080046#define FCS_BIG_CNTR_VAL_MAX 495U
47#define FCS_SVN_CNTR_VAL_MAX 64U
Sieu Mun Tang2a820b92022-05-11 09:59:55 +080048
Sieu Mun Tang28af1652022-05-09 10:48:53 +080049/* FCS Attestation Cert Request Parameter */
50
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080051#define FCS_ALIAS_CERT 0x01
52#define FCS_DEV_ID_SELF_SIGN_CERT 0x02
53#define FCS_DEV_ID_ENROLL_CERT 0x04
54#define FCS_ENROLL_SELF_SIGN_CERT 0x08
55#define FCS_PLAT_KEY_CERT 0x10
Sieu Mun Tang28af1652022-05-09 10:48:53 +080056
Sieu Mun Tangfb1f6e92022-05-09 14:16:14 +080057/* FCS Crypto Service */
58
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080059#define FCS_CS_KEY_OBJ_MAX_WORD_SIZE 88U
60#define FCS_CS_KEY_INFO_MAX_WORD_SIZE 36U
61#define FCS_CS_KEY_RESP_STATUS_MASK 0xFF
62#define FCS_CS_KEY_RESP_STATUS_OFFSET 16U
Sieu Mun Tangfb1f6e92022-05-09 14:16:14 +080063
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080064#define FCS_CS_FIELD_SIZE_MASK 0xFFFF
65#define FCS_CS_FIELD_FLAG_OFFSET 24
66#define FCS_CS_FIELD_FLAG_INIT BIT(0)
67#define FCS_CS_FIELD_FLAG_UPDATE BIT(1)
68#define FCS_CS_FIELD_FLAG_FINALIZE BIT(2)
Sieu Mun Tange7a037f2022-05-10 17:18:19 +080069
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080070#define FCS_AES_MAX_DATA_SIZE 0x10000000 /* 256 MB */
71#define FCS_AES_MIN_DATA_SIZE 0x20 /* 32 Byte */
72#define FCS_AES_CMD_MAX_WORD_SIZE 15U
Sieu Mun Tangb0c1d112022-05-10 17:30:00 +080073
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080074#define FCS_GET_DIGEST_CMD_MAX_WORD_SIZE 7U
75#define FCS_GET_DIGEST_RESP_MAX_WORD_SIZE 19U
76#define FCS_MAC_VERIFY_CMD_MAX_WORD_SIZE 23U
77#define FCS_MAC_VERIFY_RESP_MAX_WORD_SIZE 4U
78#define FCS_SHA_HMAC_CRYPTO_PARAM_SIZE_OFFSET 8U
Sieu Mun Tange2f3ede2022-05-10 17:36:32 +080079
Sieu Mun Tangdcaab772022-05-11 10:16:40 +080080#define FCS_ECDSA_GET_PUBKEY_MAX_WORD_SIZE 5U
81#define FCS_ECDSA_SHA2_DATA_SIGN_CMD_MAX_WORD_SIZE 7U
82#define FCS_ECDSA_SHA2_DATA_SIG_VERIFY_CMD_MAX_WORD_SIZE 43U
Sieu Mun Tang8aa05ad2022-05-10 17:50:30 +080083#define FCS_ECDSA_HASH_SIGN_CMD_MAX_WORD_SIZE 17U
Sieu Mun Tang59357e82022-05-10 17:53:32 +080084#define FCS_ECDSA_HASH_SIG_VERIFY_CMD_MAX_WORD_SIZE 52U
Sieu Mun Tang0675c222022-05-10 17:48:11 +080085#define FCS_ECDH_REQUEST_CMD_MAX_WORD_SIZE 29U
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +080086/* FCS Payload Structure */
Sieu Mun Tange7a037f2022-05-10 17:18:19 +080087typedef struct fcs_rng_payload_t {
88 uint32_t session_id;
89 uint32_t context_id;
90 uint32_t crypto_header;
91 uint32_t size;
92} fcs_rng_payload;
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +080093
Sieu Mun Tang128d2a72022-05-11 09:49:25 +080094typedef struct fcs_encrypt_payload_t {
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +080095 uint32_t first_word;
96 uint32_t src_addr;
97 uint32_t src_size;
98 uint32_t dst_addr;
99 uint32_t dst_size;
Sieu Mun Tang128d2a72022-05-11 09:49:25 +0800100} fcs_encrypt_payload;
101
102typedef struct fcs_decrypt_payload_t {
103 uint32_t first_word;
104 uint32_t owner_id[2];
105 uint32_t src_addr;
106 uint32_t src_size;
107 uint32_t dst_addr;
108 uint32_t dst_size;
109} fcs_decrypt_payload;
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +0800110
Sieu Mun Tang22322fb2022-05-09 16:05:58 +0800111typedef struct fcs_encrypt_ext_payload_t {
112 uint32_t session_id;
113 uint32_t context_id;
114 uint32_t crypto_header;
115 uint32_t src_addr;
116 uint32_t src_size;
117 uint32_t dst_addr;
118 uint32_t dst_size;
119} fcs_encrypt_ext_payload;
120
121typedef struct fcs_decrypt_ext_payload_t {
122 uint32_t session_id;
123 uint32_t context_id;
124 uint32_t crypto_header;
125 uint32_t owner_id[2];
126 uint32_t src_addr;
127 uint32_t src_size;
128 uint32_t dst_addr;
129 uint32_t dst_size;
130} fcs_decrypt_ext_payload;
131
Sieu Mun Tang2a820b92022-05-11 09:59:55 +0800132typedef struct psgsigma_teardown_msg_t {
133 uint32_t reserved_word;
134 uint32_t magic_word;
135 uint32_t session_id;
136} psgsigma_teardown_msg;
137
Sieu Mun Tanga068fdf2022-05-11 10:01:54 +0800138typedef struct fcs_cntr_set_preauth_payload_t {
139 uint32_t first_word;
140 uint32_t counter_value;
141} fcs_cntr_set_preauth_payload;
Sieu Mun Tang2a820b92022-05-11 09:59:55 +0800142
Sieu Mun Tangfb1f6e92022-05-09 14:16:14 +0800143typedef struct fcs_cs_key_payload_t {
144 uint32_t session_id;
145 uint32_t reserved0;
146 uint32_t reserved1;
147 uint32_t key_id;
148} fcs_cs_key_payload;
149
Sieu Mun Tangd907cc32022-05-10 17:24:05 +0800150typedef struct fcs_crypto_service_data_t {
151 uint32_t session_id;
152 uint32_t context_id;
153 uint32_t key_id;
154 uint32_t crypto_param_size;
155 uint64_t crypto_param;
156} fcs_crypto_service_data;
157
Sieu Mun Tangb0c1d112022-05-10 17:30:00 +0800158typedef struct fcs_crypto_service_aes_data_t {
159 uint32_t session_id;
160 uint32_t context_id;
161 uint32_t param_size;
162 uint32_t key_id;
163 uint32_t crypto_param[7];
164} fcs_crypto_service_aes_data;
165
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +0800166/* Functions Definitions */
167
168uint32_t intel_fcs_random_number_gen(uint64_t addr, uint64_t *ret_size,
169 uint32_t *mbox_error);
Sieu Mun Tange7a037f2022-05-10 17:18:19 +0800170int intel_fcs_random_number_gen_ext(uint32_t session_id, uint32_t context_id,
171 uint32_t size, uint32_t *send_id);
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +0800172uint32_t intel_fcs_send_cert(uint64_t addr, uint64_t size,
173 uint32_t *send_id);
174uint32_t intel_fcs_get_provision_data(uint32_t *send_id);
Sieu Mun Tanga068fdf2022-05-11 10:01:54 +0800175uint32_t intel_fcs_cntr_set_preauth(uint8_t counter_type,
176 int32_t counter_value,
177 uint32_t test_bit,
178 uint32_t *mbox_error);
Sieu Mun Tang128d2a72022-05-11 09:49:25 +0800179uint32_t intel_fcs_encryption(uint32_t src_addr, uint32_t src_size,
180 uint32_t dst_addr, uint32_t dst_size,
181 uint32_t *send_id);
182
183uint32_t intel_fcs_decryption(uint32_t src_addr, uint32_t src_size,
184 uint32_t dst_addr, uint32_t dst_size,
185 uint32_t *send_id);
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +0800186
Sieu Mun Tang22322fb2022-05-09 16:05:58 +0800187int intel_fcs_encryption_ext(uint32_t session_id, uint32_t context_id,
188 uint32_t src_addr, uint32_t src_size,
189 uint32_t dst_addr, uint32_t *dst_size,
190 uint32_t *mbox_error);
191int intel_fcs_decryption_ext(uint32_t sesion_id, uint32_t context_id,
192 uint32_t src_addr, uint32_t src_size,
193 uint32_t dst_addr, uint32_t *dst_size,
194 uint32_t *mbox_error);
195
Sieu Mun Tang2a820b92022-05-11 09:59:55 +0800196int intel_fcs_sigma_teardown(uint32_t session_id, uint32_t *mbox_error);
197int intel_fcs_chip_id(uint32_t *id_low, uint32_t *id_high, uint32_t *mbox_error);
198int intel_fcs_attestation_subkey(uint64_t src_addr, uint32_t src_size,
199 uint64_t dst_addr, uint32_t *dst_size,
200 uint32_t *mbox_error);
201int intel_fcs_get_measurement(uint64_t src_addr, uint32_t src_size,
202 uint64_t dst_addr, uint32_t *dst_size,
203 uint32_t *mbox_error);
Sieu Mun Tanga34b8812022-03-17 03:11:55 +0800204uint32_t intel_fcs_get_rom_patch_sha384(uint64_t addr, uint64_t *ret_size,
205 uint32_t *mbox_error);
206
Sieu Mun Tang28af1652022-05-09 10:48:53 +0800207int intel_fcs_create_cert_on_reload(uint32_t cert_request,
208 uint32_t *mbox_error);
209int intel_fcs_get_attestation_cert(uint32_t cert_request, uint64_t dst_addr,
210 uint32_t *dst_size, uint32_t *mbox_error);
211
Sieu Mun Tang16754e12022-05-09 12:08:42 +0800212int intel_fcs_open_crypto_service_session(uint32_t *session_id,
213 uint32_t *mbox_error);
214int intel_fcs_close_crypto_service_session(uint32_t session_id,
215 uint32_t *mbox_error);
216
Sieu Mun Tangfb1f6e92022-05-09 14:16:14 +0800217int intel_fcs_import_crypto_service_key(uint64_t src_addr, uint32_t src_size,
218 uint32_t *mbox_error);
219int intel_fcs_export_crypto_service_key(uint32_t session_id, uint32_t key_id,
220 uint64_t dst_addr, uint32_t *dst_size,
221 uint32_t *mbox_error);
222int intel_fcs_remove_crypto_service_key(uint32_t session_id, uint32_t key_id,
223 uint32_t *mbox_error);
224int intel_fcs_get_crypto_service_key_info(uint32_t session_id, uint32_t key_id,
225 uint64_t dst_addr, uint32_t *dst_size,
226 uint32_t *mbox_error);
227
Sieu Mun Tangd907cc32022-05-10 17:24:05 +0800228int intel_fcs_get_digest_init(uint32_t session_id, uint32_t context_id,
229 uint32_t key_id, uint32_t param_size,
230 uint64_t param_data, uint32_t *mbox_error);
231int intel_fcs_get_digest_finalize(uint32_t session_id, uint32_t context_id,
232 uint32_t src_addr, uint32_t src_size,
233 uint64_t dst_addr, uint32_t *dst_size,
234 uint32_t *mbox_error);
235
Sieu Mun Tang583149a2022-05-10 17:27:12 +0800236int intel_fcs_mac_verify_init(uint32_t session_id, uint32_t context_id,
237 uint32_t key_id, uint32_t param_size,
238 uint64_t param_data, uint32_t *mbox_error);
239int intel_fcs_mac_verify_finalize(uint32_t session_id, uint32_t context_id,
240 uint32_t src_addr, uint32_t src_size,
241 uint64_t dst_addr, uint32_t *dst_size,
242 uint32_t data_size, uint32_t *mbox_error);
243
Sieu Mun Tang8aa05ad2022-05-10 17:50:30 +0800244int intel_fcs_ecdsa_hash_sign_init(uint32_t session_id, uint32_t context_id,
245 uint32_t key_id, uint32_t param_size,
246 uint64_t param_data, uint32_t *mbox_error);
247int intel_fcs_ecdsa_hash_sign_finalize(uint32_t session_id, uint32_t context_id,
248 uint32_t src_addr, uint32_t src_size,
249 uint64_t dst_addr, uint32_t *dst_size,
250 uint32_t *mbox_error);
251
Sieu Mun Tang59357e82022-05-10 17:53:32 +0800252int intel_fcs_ecdsa_hash_sig_verify_init(uint32_t session_id, uint32_t context_id,
253 uint32_t key_id, uint32_t param_size,
254 uint64_t param_data, uint32_t *mbox_error);
255int intel_fcs_ecdsa_hash_sig_verify_finalize(uint32_t session_id, uint32_t context_id,
256 uint32_t src_addr, uint32_t src_size,
257 uint64_t dst_addr, uint32_t *dst_size,
258 uint32_t *mbox_error);
259
Sieu Mun Tang153ecfb2022-05-10 17:39:26 +0800260int intel_fcs_ecdsa_sha2_data_sign_init(uint32_t session_id,
261 uint32_t context_id, uint32_t key_id,
262 uint32_t param_size, uint64_t param_data,
263 uint32_t *mbox_error);
264int intel_fcs_ecdsa_sha2_data_sign_finalize(uint32_t session_id,
265 uint32_t context_id, uint32_t src_addr,
266 uint32_t src_size, uint64_t dst_addr,
267 uint32_t *dst_size, uint32_t *mbox_error);
268
Sieu Mun Tangdcaab772022-05-11 10:16:40 +0800269int intel_fcs_ecdsa_sha2_data_sig_verify_init(uint32_t session_id,
270 uint32_t context_id, uint32_t key_id,
271 uint32_t param_size, uint64_t param_data,
272 uint32_t *mbox_error);
273int intel_fcs_ecdsa_sha2_data_sig_verify_finalize(uint32_t session_id,
274 uint32_t context_id, uint32_t src_addr,
275 uint32_t src_size, uint64_t dst_addr,
276 uint32_t *dst_size, uint32_t data_size,
277 uint32_t *mbox_error);
278
Sieu Mun Tange2f3ede2022-05-10 17:36:32 +0800279int intel_fcs_ecdsa_get_pubkey_init(uint32_t session_id, uint32_t context_id,
280 uint32_t key_id, uint32_t param_size,
281 uint64_t param_data, uint32_t *mbox_error);
282int intel_fcs_ecdsa_get_pubkey_finalize(uint32_t session_id, uint32_t context_id,
283 uint64_t dst_addr, uint32_t *dst_size,
284 uint32_t *mbox_error);
285
Sieu Mun Tang0675c222022-05-10 17:48:11 +0800286int intel_fcs_ecdh_request_init(uint32_t session_id, uint32_t context_id,
287 uint32_t key_id, uint32_t param_size,
288 uint64_t param_data, uint32_t *mbox_error);
289int intel_fcs_ecdh_request_finalize(uint32_t session_id, uint32_t context_id,
290 uint32_t src_addr, uint32_t src_size,
291 uint64_t dst_addr, uint32_t *dst_size,
292 uint32_t *mbox_error);
293
Sieu Mun Tangb0c1d112022-05-10 17:30:00 +0800294int intel_fcs_aes_crypt_init(uint32_t session_id, uint32_t context_id,
295 uint32_t key_id, uint64_t param_addr,
296 uint32_t param_size, uint32_t *mbox_error);
297int intel_fcs_aes_crypt_finalize(uint32_t session_id, uint32_t context_id,
298 uint64_t src_addr, uint32_t src_size,
299 uint64_t dst_addr, uint32_t dst_size,
300 uint32_t *send_id);
301
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +0800302#endif /* SOCFPGA_FCS_H */