Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Dan Handley | 0cdebbd | 2015-03-30 17:15:16 +0100 | [diff] [blame] | 2 | * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 31 | #include <arch.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 32 | #include <arch_helpers.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 33 | #include <assert.h> |
Juan Castillo | a08a5e7 | 2015-05-19 11:54:12 +0100 | [diff] [blame] | 34 | #include <auth_mod.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 35 | #include <bl_common.h> |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 36 | #include <debug.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 37 | #include <platform.h> |
Dan Handley | ed6ff95 | 2014-05-14 17:44:19 +0100 | [diff] [blame] | 38 | #include <platform_def.h> |
Dan Handley | bcd60ba | 2014-04-17 18:53:42 +0100 | [diff] [blame] | 39 | #include "bl1_private.h" |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 40 | |
Vikram Kanigiri | a3a5e4a | 2014-05-15 18:27:15 +0100 | [diff] [blame] | 41 | |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame^] | 42 | static void bl1_load_bl2(void); |
Vikram Kanigiri | a3a5e4a | 2014-05-15 18:27:15 +0100 | [diff] [blame] | 43 | |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 44 | /******************************************************************************* |
| 45 | * The next function has a weak definition. Platform specific code can override |
| 46 | * it if it wishes to. |
| 47 | ******************************************************************************/ |
| 48 | #pragma weak bl1_init_bl2_mem_layout |
Vikram Kanigiri | a3a5e4a | 2014-05-15 18:27:15 +0100 | [diff] [blame] | 49 | |
| 50 | /******************************************************************************* |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 51 | * Function that takes a memory layout into which BL2 has been loaded and |
| 52 | * populates a new memory layout for BL2 that ensures that BL1's data sections |
| 53 | * resident in secure RAM are not visible to BL2. |
| 54 | ******************************************************************************/ |
| 55 | void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout, |
| 56 | meminfo_t *bl2_mem_layout) |
| 57 | { |
| 58 | const size_t bl1_size = BL1_RAM_LIMIT - BL1_RAM_BASE; |
| 59 | |
| 60 | assert(bl1_mem_layout != NULL); |
| 61 | assert(bl2_mem_layout != NULL); |
| 62 | |
| 63 | /* Check that BL1's memory is lying outside of the free memory */ |
| 64 | assert((BL1_RAM_LIMIT <= bl1_mem_layout->free_base) || |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame^] | 65 | (BL1_RAM_BASE >= bl1_mem_layout->free_base + |
| 66 | bl1_mem_layout->free_size)); |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 67 | |
| 68 | /* Remove BL1 RW data from the scope of memory visible to BL2 */ |
| 69 | *bl2_mem_layout = *bl1_mem_layout; |
| 70 | reserve_mem(&bl2_mem_layout->total_base, |
| 71 | &bl2_mem_layout->total_size, |
| 72 | BL1_RAM_BASE, |
| 73 | bl1_size); |
| 74 | |
| 75 | flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t)); |
| 76 | } |
| 77 | |
| 78 | /******************************************************************************* |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 79 | * Function to perform late architectural and platform specific initialization. |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame^] | 80 | * It also queries the platform to load and run next BL image. Only called |
| 81 | * by the primary cpu after a cold boot. |
| 82 | ******************************************************************************/ |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 83 | void bl1_main(void) |
| 84 | { |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame^] | 85 | unsigned int image_id; |
| 86 | |
Dan Handley | 91b624e | 2014-07-29 17:14:00 +0100 | [diff] [blame] | 87 | /* Announce our arrival */ |
| 88 | NOTICE(FIRMWARE_WELCOME_STR); |
| 89 | NOTICE("BL1: %s\n", version_string); |
| 90 | NOTICE("BL1: %s\n", build_message); |
| 91 | |
| 92 | INFO("BL1: RAM 0x%lx - 0x%lx\n", BL1_RAM_BASE, BL1_RAM_LIMIT); |
| 93 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 94 | |
Dan Handley | 0cdebbd | 2015-03-30 17:15:16 +0100 | [diff] [blame] | 95 | #if DEBUG |
| 96 | unsigned long val; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 97 | /* |
| 98 | * Ensure that MMU/Caches and coherency are turned on |
| 99 | */ |
Dan Handley | 0cdebbd | 2015-03-30 17:15:16 +0100 | [diff] [blame] | 100 | val = read_sctlr_el3(); |
Andrew Thoelke | 5e287b5 | 2015-06-11 14:12:14 +0100 | [diff] [blame] | 101 | assert(val & SCTLR_M_BIT); |
| 102 | assert(val & SCTLR_C_BIT); |
| 103 | assert(val & SCTLR_I_BIT); |
Dan Handley | 0cdebbd | 2015-03-30 17:15:16 +0100 | [diff] [blame] | 104 | /* |
| 105 | * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the |
| 106 | * provided platform value |
| 107 | */ |
| 108 | val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; |
| 109 | /* |
| 110 | * If CWG is zero, then no CWG information is available but we can |
| 111 | * at least check the platform value is less than the architectural |
| 112 | * maximum. |
| 113 | */ |
| 114 | if (val != 0) |
| 115 | assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); |
| 116 | else |
| 117 | assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); |
| 118 | #endif |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 119 | |
| 120 | /* Perform remaining generic architectural setup from EL3 */ |
| 121 | bl1_arch_setup(); |
| 122 | |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame^] | 123 | #if TRUSTED_BOARD_BOOT |
| 124 | /* Initialize authentication module */ |
| 125 | auth_mod_init(); |
| 126 | #endif /* TRUSTED_BOARD_BOOT */ |
| 127 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 128 | /* Perform platform setup in BL1. */ |
| 129 | bl1_platform_setup(); |
| 130 | |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame^] | 131 | /* Get the image id of next image to load and run. */ |
| 132 | image_id = bl1_plat_get_next_image_id(); |
| 133 | |
| 134 | if (image_id == BL2_IMAGE_ID) |
| 135 | bl1_load_bl2(); |
| 136 | |
| 137 | bl1_prepare_next_image(image_id); |
| 138 | } |
| 139 | |
| 140 | /******************************************************************************* |
| 141 | * This function locates and loads the BL2 raw binary image in the trusted SRAM. |
| 142 | * Called by the primary cpu after a cold boot. |
| 143 | * TODO: Add support for alternative image load mechanism e.g using virtio/elf |
| 144 | * loader etc. |
| 145 | ******************************************************************************/ |
| 146 | void bl1_load_bl2(void) |
| 147 | { |
| 148 | image_desc_t *image_desc; |
| 149 | image_info_t *image_info; |
| 150 | entry_point_info_t *ep_info; |
| 151 | meminfo_t *bl1_tzram_layout; |
| 152 | meminfo_t *bl2_tzram_layout; |
| 153 | int err; |
| 154 | |
| 155 | /* Get the image descriptor */ |
| 156 | image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); |
| 157 | assert(image_desc); |
| 158 | |
| 159 | /* Get the image info */ |
| 160 | image_info = &image_desc->image_info; |
| 161 | |
| 162 | /* Get the entry point info */ |
| 163 | ep_info = &image_desc->ep_info; |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 164 | |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 165 | /* Find out how much free trusted ram remains after BL1 load */ |
Sandrine Bailleux | ee12f6f | 2013-11-28 14:55:58 +0000 | [diff] [blame] | 166 | bl1_tzram_layout = bl1_plat_sec_mem_layout(); |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 167 | |
Juan Castillo | 3a66aca | 2015-04-13 17:36:19 +0100 | [diff] [blame] | 168 | INFO("BL1: Loading BL2\n"); |
| 169 | |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 170 | /* Load the BL2 image */ |
Juan Castillo | a08a5e7 | 2015-05-19 11:54:12 +0100 | [diff] [blame] | 171 | err = load_auth_image(bl1_tzram_layout, |
Juan Castillo | 3a66aca | 2015-04-13 17:36:19 +0100 | [diff] [blame] | 172 | BL2_IMAGE_ID, |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame^] | 173 | image_info->image_base, |
| 174 | image_info, |
| 175 | ep_info); |
Juan Castillo | a08a5e7 | 2015-05-19 11:54:12 +0100 | [diff] [blame] | 176 | |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 177 | if (err) { |
Dan Handley | 91b624e | 2014-07-29 17:14:00 +0100 | [diff] [blame] | 178 | ERROR("Failed to load BL2 firmware.\n"); |
Juan Castillo | 26ae583 | 2015-09-25 15:41:14 +0100 | [diff] [blame] | 179 | plat_error_handler(err); |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 180 | } |
Juan Castillo | d227d8b | 2015-01-07 13:49:59 +0000 | [diff] [blame] | 181 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 182 | /* |
| 183 | * Create a new layout of memory for BL2 as seen by BL1 i.e. |
| 184 | * tell it the amount of total and free memory available. |
| 185 | * This layout is created at the first free address visible |
| 186 | * to BL2. BL2 will read the memory layout before using its |
| 187 | * memory for other purposes. |
| 188 | */ |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 189 | bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base; |
Sandrine Bailleux | 467d057 | 2014-06-24 14:02:34 +0100 | [diff] [blame] | 190 | bl1_init_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 191 | |
Yatharth Kochar | a65be2f | 2015-10-09 18:06:13 +0100 | [diff] [blame^] | 192 | ep_info->args.arg1 = (unsigned long)bl2_tzram_layout; |
| 193 | NOTICE("BL1: Booting BL2\n"); |
| 194 | VERBOSE("BL1: BL2 memory layout address = 0x%llx\n", |
| 195 | (unsigned long long) bl2_tzram_layout); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 196 | } |
| 197 | |
| 198 | /******************************************************************************* |
Sandrine Bailleux | 33c95cc | 2015-10-27 15:52:33 +0000 | [diff] [blame] | 199 | * Function called just before handing over to BL31 to inform the user about |
| 200 | * the boot progress. In debug mode, also print details about the BL31 image's |
| 201 | * execution context. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 202 | ******************************************************************************/ |
Sandrine Bailleux | 33c95cc | 2015-10-27 15:52:33 +0000 | [diff] [blame] | 203 | void bl1_print_bl31_ep_info(const entry_point_info_t *bl31_ep_info) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 204 | { |
Dan Handley | 91b624e | 2014-07-29 17:14:00 +0100 | [diff] [blame] | 205 | NOTICE("BL1: Booting BL3-1\n"); |
Sandrine Bailleux | b2e224c | 2015-09-28 17:03:06 +0100 | [diff] [blame] | 206 | print_entry_point_info(bl31_ep_info); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 207 | } |
Sandrine Bailleux | b7e97c4 | 2015-11-10 10:01:19 +0000 | [diff] [blame] | 208 | |
| 209 | #if SPIN_ON_BL1_EXIT |
| 210 | void print_debug_loop_message(void) |
| 211 | { |
| 212 | NOTICE("BL1: Debug loop, spinning forever\n"); |
| 213 | NOTICE("BL1: Please connect the debugger to continue\n"); |
| 214 | } |
| 215 | #endif |