| Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 1 | # |
| Varun Wadekar | e9d69f7 | 2017-11-29 15:34:58 -0800 | [diff] [blame] | 2 | # Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. |
| Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | # platform configs |
| Varun Wadekar | 19ecdb9 | 2017-12-01 09:24:12 -0800 | [diff] [blame] | 8 | ENABLE_CONSOLE_SPE := 1 |
| Varun Wadekar | 9d15f7e | 2019-08-21 14:01:31 -0700 | [diff] [blame] | 9 | $(eval $(call add_define,ENABLE_CONSOLE_SPE)) |
| 10 | |
| Varun Wadekar | 602cf7e | 2018-04-03 13:10:48 -0700 | [diff] [blame] | 11 | ENABLE_STRICT_CHECKING_MODE := 1 |
| Steven Kao | 8f4f102 | 2017-12-13 06:39:15 +0800 | [diff] [blame] | 12 | $(eval $(call add_define,ENABLE_STRICT_CHECKING_MODE)) |
| 13 | |
| Varun Wadekar | 602cf7e | 2018-04-03 13:10:48 -0700 | [diff] [blame] | 14 | USE_GPC_DMA := 1 |
| 15 | $(eval $(call add_define,USE_GPC_DMA)) |
| 16 | |
| Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 17 | RESET_TO_BL31 := 1 |
| 18 | |
| 19 | PROGRAMMABLE_RESET_ADDRESS := 1 |
| 20 | |
| 21 | COLD_BOOT_SINGLE_CPU := 1 |
| 22 | |
| 23 | # platform settings |
| 24 | TZDRAM_BASE := 0x40000000 |
| 25 | $(eval $(call add_define,TZDRAM_BASE)) |
| 26 | |
| Ajay Gupta | 8162109 | 2017-08-01 15:53:04 -0700 | [diff] [blame] | 27 | MAX_XLAT_TABLES := 25 |
| Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 28 | $(eval $(call add_define,MAX_XLAT_TABLES)) |
| 29 | |
| Steven Kao | 58d1194 | 2017-09-29 16:32:34 +0800 | [diff] [blame] | 30 | MAX_MMAP_REGIONS := 30 |
| Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 31 | $(eval $(call add_define,MAX_MMAP_REGIONS)) |
| 32 | |
| 33 | # platform files |
| Varun Wadekar | 26dfb51 | 2019-01-17 16:36:23 -0800 | [diff] [blame] | 34 | PLAT_INCLUDES += -Iplat/nvidia/tegra/include/t194 \ |
| 35 | -I${SOC_DIR}/drivers/include |
| Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 36 | |
| Varun Wadekar | 9d15f7e | 2019-08-21 14:01:31 -0700 | [diff] [blame] | 37 | BL31_SOURCES += drivers/ti/uart/aarch64/16550_console.S \ |
| Varun Wadekar | 498d501 | 2017-11-15 15:52:01 -0800 | [diff] [blame] | 38 | lib/cpus/aarch64/denver.S \ |
| steven kao | e579606 | 2018-01-02 19:09:04 -0800 | [diff] [blame] | 39 | ${COMMON_DIR}/drivers/bpmp_ipc/intf.c \ |
| 40 | ${COMMON_DIR}/drivers/bpmp_ipc/ivc.c \ |
| Varun Wadekar | 602cf7e | 2018-04-03 13:10:48 -0700 | [diff] [blame] | 41 | ${COMMON_DIR}/drivers/gpcdma/gpcdma.c \ |
| Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 42 | ${COMMON_DIR}/drivers/memctrl/memctrl_v2.c \ |
| 43 | ${COMMON_DIR}/drivers/smmu/smmu.c \ |
| 44 | ${SOC_DIR}/drivers/mce/mce.c \ |
| Steven Kao | 2cdb678 | 2017-01-05 17:04:40 +0800 | [diff] [blame] | 45 | ${SOC_DIR}/drivers/mce/nvg.c \ |
| 46 | ${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \ |
| Steven Kao | 530b217 | 2017-06-23 16:18:58 +0800 | [diff] [blame] | 47 | ${SOC_DIR}/drivers/se/se.c \ |
| Varun Wadekar | 0075990 | 2017-05-31 11:41:00 -0700 | [diff] [blame] | 48 | ${SOC_DIR}/plat_memctrl.c \ |
| Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 49 | ${SOC_DIR}/plat_psci_handlers.c \ |
| 50 | ${SOC_DIR}/plat_setup.c \ |
| 51 | ${SOC_DIR}/plat_secondary.c \ |
| Varun Wadekar | 0075990 | 2017-05-31 11:41:00 -0700 | [diff] [blame] | 52 | ${SOC_DIR}/plat_sip_calls.c \ |
| Varun Wadekar | 362a6b2 | 2017-11-10 11:04:42 -0800 | [diff] [blame] | 53 | ${SOC_DIR}/plat_smmu.c \ |
| 54 | ${SOC_DIR}/plat_trampoline.S |
| Varun Wadekar | 9d15f7e | 2019-08-21 14:01:31 -0700 | [diff] [blame] | 55 | |
| 56 | ifeq (${ENABLE_CONSOLE_SPE},1) |
| 57 | BL31_SOURCES += ${COMMON_DIR}/drivers/spe/shared_console.S |
| 58 | endif |