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Caesar Wangf33eb2c2016-10-27 01:13:16 +08001/*
Jimmy Brissonfc7df8d2020-06-29 12:21:23 -05002 * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
Caesar Wangf33eb2c2016-10-27 01:13:16 +08003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Caesar Wangf33eb2c2016-10-27 01:13:16 +08005 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef SUSPEND_H
8#define SUSPEND_H
9
Jimmy Brissonfc7df8d2020-06-29 12:21:23 -050010#include <stdint.h>
Caesar Wangf33eb2c2016-10-27 01:13:16 +080011#include <dram.h>
12
13#define KHz (1000)
14#define MHz (1000 * KHz)
15#define GHz (1000 * MHz)
16
17#define PI_CA_TRAINING (1 << 0)
18#define PI_WRITE_LEVELING (1 << 1)
19#define PI_READ_GATE_TRAINING (1 << 2)
20#define PI_READ_LEVELING (1 << 3)
21#define PI_WDQ_LEVELING (1 << 4)
22#define PI_FULL_TRAINING (0xff)
23
Lin Huang1f8fdeb2017-05-17 16:14:37 +080024void dmc_suspend(void);
25__pmusramfunc void dmc_resume(void);
Jimmy Brissonfc7df8d2020-06-29 12:21:23 -050026extern __pmusramdata uint8_t pmu_enable_watchdog0;
Caesar Wangf33eb2c2016-10-27 01:13:16 +080027
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000028#endif /* SUSPEND_H */