Caesar Wang | f33eb2c | 2016-10-27 01:13:16 +0800 | [diff] [blame] | 1 | /* |
Jimmy Brisson | fc7df8d | 2020-06-29 12:21:23 -0500 | [diff] [blame^] | 2 | * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved. |
Caesar Wang | f33eb2c | 2016-10-27 01:13:16 +0800 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Caesar Wang | f33eb2c | 2016-10-27 01:13:16 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 7 | #ifndef SUSPEND_H |
| 8 | #define SUSPEND_H |
| 9 | |
Jimmy Brisson | fc7df8d | 2020-06-29 12:21:23 -0500 | [diff] [blame^] | 10 | #include <stdint.h> |
Caesar Wang | f33eb2c | 2016-10-27 01:13:16 +0800 | [diff] [blame] | 11 | #include <dram.h> |
| 12 | |
| 13 | #define KHz (1000) |
| 14 | #define MHz (1000 * KHz) |
| 15 | #define GHz (1000 * MHz) |
| 16 | |
| 17 | #define PI_CA_TRAINING (1 << 0) |
| 18 | #define PI_WRITE_LEVELING (1 << 1) |
| 19 | #define PI_READ_GATE_TRAINING (1 << 2) |
| 20 | #define PI_READ_LEVELING (1 << 3) |
| 21 | #define PI_WDQ_LEVELING (1 << 4) |
| 22 | #define PI_FULL_TRAINING (0xff) |
| 23 | |
Lin Huang | 1f8fdeb | 2017-05-17 16:14:37 +0800 | [diff] [blame] | 24 | void dmc_suspend(void); |
| 25 | __pmusramfunc void dmc_resume(void); |
Jimmy Brisson | fc7df8d | 2020-06-29 12:21:23 -0500 | [diff] [blame^] | 26 | extern __pmusramdata uint8_t pmu_enable_watchdog0; |
Caesar Wang | f33eb2c | 2016-10-27 01:13:16 +0800 | [diff] [blame] | 27 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 28 | #endif /* SUSPEND_H */ |