blob: a20e258a9c14a0b1b46a6eb21306e69fee802c88 [file] [log] [blame]
Dan Handley9df48042015-03-19 18:58:55 +00001#
Mikael Olsson7da66192021-02-12 17:30:22 +01002# Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005#
6
Soby Mathew0d268dc2016-07-11 14:13:56 +01007ifeq (${ARCH}, aarch64)
8 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
9 # DRAM (if available) or the TZC secured area of DRAM.
Dimitris Papastamos8a418592018-01-02 10:25:50 +000010 # TZC secured DRAM is the default.
Dan Handley9df48042015-03-19 18:58:55 +000011
Dimitris Papastamos8a418592018-01-02 10:25:50 +000012 ARM_TSP_RAM_LOCATION ?= dram
Qixiang Xuc7b12c52017-10-13 09:04:12 +080013
Soby Mathew0d268dc2016-07-11 14:13:56 +010014 ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
15 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
16 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
18 else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
19 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
20 else
21 $(error "Unsupported ARM_TSP_RAM_LOCATION value")
22 endif
Dan Handley9df48042015-03-19 18:58:55 +000023
Soby Mathew0d268dc2016-07-11 14:13:56 +010024 # Process flags
Soby Mathew0d268dc2016-07-11 14:13:56 +010025 # Process ARM_BL31_IN_DRAM flag
26 ARM_BL31_IN_DRAM := 0
27 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
28 $(eval $(call add_define,ARM_BL31_IN_DRAM))
Roberto Vargasac6dc352017-10-20 10:46:23 +010029else
30 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
Soby Mathew0d268dc2016-07-11 14:13:56 +010031endif
Dan Handley9df48042015-03-19 18:58:55 +000032
Roberto Vargasac6dc352017-10-20 10:46:23 +010033$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
34
35
Soby Mathew7799cf72015-04-16 14:49:09 +010036# For the original power-state parameter format, the State-ID can be encoded
37# according to the recommended encoding or zero. This flag determines which
38# State-ID encoding to be parsed.
39ARM_RECOM_STATE_ID_ENC := 0
40
Douglas Raillard66933ff2016-11-07 17:29:34 +000041# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
42# be set. Else throw a build error.
Soby Mathew7799cf72015-04-16 14:49:09 +010043ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
44 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
Douglas Raillard66933ff2016-11-07 17:29:34 +000045 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
46 PSCI_EXTENDED_STATE_ID is set for ARM platforms)
Soby Mathew7799cf72015-04-16 14:49:09 +010047 endif
48endif
49
50# Process ARM_RECOM_STATE_ID_ENC flag
51$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
52$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
53
Juan Castillob6132f12015-10-06 14:01:35 +010054# Process ARM_DISABLE_TRUSTED_WDOG flag
Zelalem Awekeaf7e3a42021-10-01 12:30:49 -050055# By default, Trusted Watchdog is always enabled unless
56# SPIN_ON_BL1_EXIT or ENABLE_RME is set
Juan Castillob6132f12015-10-06 14:01:35 +010057ARM_DISABLE_TRUSTED_WDOG := 0
Zelalem Awekeaf7e3a42021-10-01 12:30:49 -050058ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
Juan Castillob6132f12015-10-06 14:01:35 +010059ARM_DISABLE_TRUSTED_WDOG := 1
60endif
61$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
62$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
63
Juan Castilloaadf19a2015-11-06 16:02:32 +000064# Process ARM_CONFIG_CNTACR
65ARM_CONFIG_CNTACR := 1
66$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
67$(eval $(call add_define,ARM_CONFIG_CNTACR))
68
David Wang0ba499f2016-03-07 11:02:57 +080069# Process ARM_BL31_IN_DRAM flag
70ARM_BL31_IN_DRAM := 0
71$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
72$(eval $(call add_define,ARM_BL31_IN_DRAM))
73
Summer Qin93c812f2017-02-28 16:46:17 +000074# Process ARM_PLAT_MT flag
75ARM_PLAT_MT := 0
76$(eval $(call assert_boolean,ARM_PLAT_MT))
77$(eval $(call add_define,ARM_PLAT_MT))
78
Antonio Nino Diazf09d0032017-04-11 14:04:56 +010079# Use translation tables library v2 by default
80ARM_XLAT_TABLES_LIB_V1 := 0
81$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
82$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
83
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +010084# Don't have the Linux kernel as a BL33 image by default
85ARM_LINUX_KERNEL_AS_BL33 := 0
86$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
87$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
88
89ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
Andre Przywara6a3ac4e2021-02-08 17:40:48 +000090 ifneq (${ARCH},aarch64)
Manish Pandey37c4ec22018-11-02 13:28:25 +000091 ifneq (${RESET_TO_SP_MIN},1)
92 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
93 endif
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +010094 endif
95 ifndef PRELOADED_BL33_BASE
96 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
97 endif
Zelalem Aweke1e8e3fd2021-07-26 21:39:05 -050098 ifeq (${RESET_TO_BL31},1)
99 ifndef ARM_PRELOADED_DTB_BASE
100 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is
101 used with RESET_TO_BL31.")
102 endif
103 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100104 endif
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100105endif
106
Mikael Olsson7da66192021-02-12 17:30:22 +0100107# Arm Ethos-N NPU SiP service
108ARM_ETHOSN_NPU_DRIVER := 0
109$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER))
110$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER))
111
Antonio Nino Diaz01b6cb92017-05-24 14:11:07 +0100112# Use an implementation of SHA-256 with a smaller memory footprint but reduced
113# speed.
114$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
115
Summer Qin80726782017-04-20 16:28:39 +0100116# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
117# in the FIP if the platform requires.
118ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900119$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Summer Qin80726782017-04-20 16:28:39 +0100120endif
121ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900122$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Summer Qin80726782017-04-20 16:28:39 +0100123endif
124
Soby Mathew421dbc42016-05-23 16:07:53 +0100125# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
Soby Mathew0d268dc2016-07-11 14:13:56 +0100126ENABLE_PSCI_STAT := 1
dp-arm66abfbe2017-01-31 13:01:04 +0000127ENABLE_PMF := 1
Soby Mathew421dbc42016-05-23 16:07:53 +0100128
Alexei Fedorov2381d2e2020-09-01 15:38:32 +0100129# Override the standard libc with optimised libc_asm
130OVERRIDE_LIBC := 1
131ifeq (${OVERRIDE_LIBC},1)
132 include lib/libc/libc_asm.mk
133endif
134
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100135# On ARM platforms, separate the code and read-only data sections to allow
136# mapping the former as executable and the latter as execute-never.
137SEPARATE_CODE_AND_RODATA := 1
138
Madhukar Pappireddyd7419442020-01-27 15:38:26 -0600139# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
140# and NOBITS sections of BL31 image are adjacent to each other and loaded
141# into Trusted SRAM.
142SEPARATE_NOBITS_REGION := 0
143
144# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
145# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
146# the build to require that ARM_BL31_IN_DRAM is enabled as well.
147ifeq ($(SEPARATE_NOBITS_REGION),1)
148 ifneq ($(ARM_BL31_IN_DRAM),1)
149 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
150 endif
151 ifneq ($(RECLAIM_INIT_CODE),0)
152 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
153 endif
154endif
155
Soby Mathew7e4d6652017-05-10 11:50:30 +0100156# Disable ARM Cryptocell by default
157ARM_CRYPTOCELL_INTEG := 0
158$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
159$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
160
Manish Pandey928da862021-06-10 15:22:48 +0100161# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
162ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
163 ENABLE_PIE := 1
Manish Pandey2207e932019-11-06 13:17:46 +0000164endif
165
Soby Mathewb9856482018-09-18 11:42:42 +0100166# CryptoCell integration relies on coherent buffers for passing data from
167# the AP CPU to the CryptoCell
168ifeq (${ARM_CRYPTOCELL_INTEG},1)
169 ifeq (${USE_COHERENT_MEM},0)
170 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.")
171 endif
172endif
173
Manish V Badarkhedd6f2522021-02-22 17:30:17 +0000174# Disable GPT parser support, use FIP image by default
175ARM_GPT_SUPPORT := 0
176$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
177$(eval $(call add_define,ARM_GPT_SUPPORT))
178
179# Include necessary sources to parse GPT image
180ifeq (${ARM_GPT_SUPPORT}, 1)
181 BL2_SOURCES += drivers/partition/gpt.c \
182 drivers/partition/partition.c
183endif
184
Manish V Badarkhe7a867922021-04-22 14:41:27 +0100185# Enable CRC instructions via extension for ARMv8-A CPUs.
186# For ARMv8.1-A, and onwards CRC instructions are default enabled.
187# Enable HW computed CRC support unconditionally in BL2 component.
188ifeq (${ARM_ARCH_MINOR},0)
189 BL2_CPPFLAGS += -march=armv8-a+crc
190endif
191
Manish V Badarkhed2f0a7a2021-06-25 23:43:33 +0100192ifeq ($(PSA_FWU_SUPPORT),1)
193 # GPT support is recommended as per PSA FWU specification hence
194 # PSA FWU implementation is tightly coupled with GPT support,
195 # and it does not support other formats.
196 ifneq ($(ARM_GPT_SUPPORT),1)
197 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
198 endif
199 FWU_MK := drivers/fwu/fwu.mk
200 $(info Including ${FWU_MK})
201 include ${FWU_MK}
202endif
203
Soby Mathew0d268dc2016-07-11 14:13:56 +0100204ifeq (${ARCH}, aarch64)
205PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
206endif
Dan Handley9df48042015-03-19 18:58:55 +0000207
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100208PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100209 plat/arm/common/arm_common.c \
210 plat/arm/common/arm_console.c
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100211
212ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
Gary Morrison3d7f6542021-01-27 13:08:47 -0600213PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100214 lib/xlat_tables/${ARCH}/xlat_tables.c
215else
Gary Morrison3d7f6542021-01-27 13:08:47 -0600216ifeq (${XLAT_MPU_LIB_V1}, 1)
217include lib/xlat_mpu/xlat_mpu.mk
218PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS}
219else
Antonio Nino Diaz719bf852017-02-23 17:22:58 +0000220include lib/xlat_tables_v2/xlat_tables.mk
Gary Morrison3d7f6542021-01-27 13:08:47 -0600221PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
222endif
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100223endif
Dan Handley9df48042015-03-19 18:58:55 +0000224
Louis Mayencourt6b232d92020-02-28 16:57:30 +0000225ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100226 plat/arm/common/fconf/arm_fconf_io.c
Olivier Deprez93df21f2020-01-23 11:24:33 +0100227ifeq (${SPD},spmd)
Balint Dobszay719ba9c2021-03-26 16:23:18 +0100228 ifeq (${BL2_ENABLE_SP_LOAD},1)
Olivier Deprez042db532020-03-19 09:27:11 +0100229 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
230 endif
Olivier Deprez93df21f2020-01-23 11:24:33 +0100231endif
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100232
Aditya Angadi20b48412019-04-16 11:29:14 +0530233BL1_SOURCES += drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000234 drivers/io/io_memmap.c \
235 drivers/io/io_storage.c \
236 plat/arm/common/arm_bl1_setup.c \
Soby Mathew94273572018-03-07 11:32:04 +0000237 plat/arm/common/arm_err.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100238 ${ARM_IO_SOURCES}
239
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000240ifdef EL3_PAYLOAD_BASE
Dimitris Papastamosd7a36512018-06-18 13:01:06 +0100241# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000242# their holding pen
243BL1_SOURCES += plat/arm/common/arm_pm.c
244endif
Dan Handley9df48042015-03-19 18:58:55 +0000245
Soby Mathew1ced6b82017-06-12 12:37:10 +0100246BL2_SOURCES += drivers/delay_timer/delay_timer.c \
247 drivers/delay_timer/generic_delay_timer.c \
248 drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000249 drivers/io/io_memmap.c \
250 drivers/io/io_storage.c \
251 plat/arm/common/arm_bl2_setup.c \
Soby Mathew94273572018-03-07 11:32:04 +0000252 plat/arm/common/arm_err.c \
Manish V Badarkhea26bf352021-07-02 20:29:56 +0100253 common/tf_crc32.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100254 ${ARM_IO_SOURCES}
Roberto Vargas52207802017-11-17 13:22:18 +0000255
Louis Mayencourt944ade82019-08-08 12:03:26 +0100256# Firmware Configuration Framework sources
257include lib/fconf/fconf.mk
Roberto Vargas52207802017-11-17 13:22:18 +0000258
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000259# Add `libfdt` and Arm common helpers required for Dynamic Config
260include lib/libfdt/libfdt.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100261
262DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000263 plat/arm/common/arm_dyn_cfg_helpers.c \
David Horstmannb2df4c12021-04-08 14:50:21 +0100264 common/fdt_wrappers.c \
265 common/uuid.c
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000266
Soby Mathew45e39e22018-03-26 15:16:46 +0100267BL1_SOURCES += ${DYN_CFG_SOURCES}
268BL2_SOURCES += ${DYN_CFG_SOURCES}
269
Roberto Vargas52207802017-11-17 13:22:18 +0000270ifeq (${BL2_AT_EL3},1)
271BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
272endif
273
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000274# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
275# the AArch32 descriptors.
276ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
277BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
278else
Abdellatif El Khlifiad9b8e52021-04-21 17:20:43 +0100279ifeq ($(filter ${TARGET_PLATFORM}, fpga fvp),)
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000280BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
281endif
Abdellatif El Khlifiad9b8e52021-04-21 17:20:43 +0100282endif
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000283BL2_SOURCES += plat/arm/common/arm_image_load.c \
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100284 common/desc_image_load.c
Summer Qin9db8f2e2017-04-24 16:49:28 +0100285ifeq (${SPD},opteed)
286BL2_SOURCES += lib/optee/optee_utils.c
287endif
Dan Handley9df48042015-03-19 18:58:55 +0000288
Soby Mathew1ced6b82017-06-12 12:37:10 +0100289BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
290 drivers/delay_timer/generic_delay_timer.c \
291 plat/arm/common/arm_bl2u_setup.c
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100292
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000293BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
Dan Handley9df48042015-03-19 18:58:55 +0000294 plat/arm/common/arm_pm.c \
Dan Handley9df48042015-03-19 18:58:55 +0000295 plat/arm/common/arm_topology.c \
Soby Mathewf6c41082016-05-03 12:31:18 +0100296 plat/common/plat_psci_common.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100297
Mikael Olsson7da66192021-02-12 17:30:22 +0100298ifneq ($(filter 1,${ENABLE_PMF} ${ARM_ETHOSN_NPU_DRIVER}),)
299ARM_SVC_HANDLER_SRCS :=
300
301ifeq (${ENABLE_PMF},1)
302ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c
303endif
304
305ifeq (${ARM_ETHOSN_NPU_DRIVER},1)
306ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \
307 drivers/delay_timer/delay_timer.c \
308 drivers/arm/ethosn/ethosn_smc.c
309endif
310
Bence Szépkúti16362c62019-10-24 15:53:23 +0200311ifeq (${ARCH}, aarch64)
312BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\
313 plat/arm/common/arm_sip_svc.c \
Mikael Olsson7da66192021-02-12 17:30:22 +0100314 ${ARM_SVC_HANDLER_SRCS}
Bence Szépkúti78dc10c2019-11-07 12:09:24 +0100315else
316BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
Mikael Olsson7da66192021-02-12 17:30:22 +0100317 ${ARM_SVC_HANDLER_SRCS}
dp-arm1cebefd2016-09-19 11:21:03 +0100318endif
Bence Szépkúti16362c62019-10-24 15:53:23 +0200319endif
dp-arm1cebefd2016-09-19 11:21:03 +0100320
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100321ifeq (${EL3_EXCEPTION_HANDLING},1)
Sandeep Tripathy1c478392020-08-12 18:42:13 +0530322BL31_SOURCES += plat/common/aarch64/plat_ehf.c
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100323endif
324
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100325ifeq (${SDEI_SUPPORT},1)
326BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
Balint Dobszayd0dbd5e2019-12-18 15:28:00 +0100327ifeq (${SDEI_IN_FCONF},1)
328BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c
329endif
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100330endif
331
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000332# RAS sources
333ifeq (${RAS_EXTENSION},1)
334BL31_SOURCES += lib/extensions/ras/std_err_record.c \
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100335 lib/extensions/ras/ras_common.c
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000336endif
337
Antonio Nino Diaz9c852aa2019-01-31 11:01:10 +0000338# Pointer Authentication sources
339ifeq (${ENABLE_PAUTH}, 1)
Alexei Fedorovf41355c2019-09-13 14:11:59 +0100340PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \
341 lib/extensions/pauth/pauth_helpers.S
Antonio Nino Diaz9c852aa2019-01-31 11:01:10 +0000342endif
343
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100344ifeq (${SPD},spmd)
345BL31_SOURCES += plat/common/plat_spmd_manifest.c \
346 common/fdt_wrappers.c \
David Horstmannb2df4c12021-04-08 14:50:21 +0100347 common/uuid.c \
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100348 ${LIBFDT_SRCS}
349
350endif
351
Juan Castilloa08a5e72015-05-19 11:54:12 +0100352ifneq (${TRUSTED_BOARD_BOOT},0)
353
Juan Castilloa08a5e72015-05-19 11:54:12 +0100354 # Include common TBB sources
355 AUTH_SOURCES := drivers/auth/auth_mod.c \
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000356 drivers/auth/crypto_mod.c \
357 drivers/auth/img_parser_mod.c \
Louis Mayencourt4da9b312019-09-30 10:57:24 +0100358 lib/fconf/fconf_tbbr_getter.c
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100359
360 # Include the selected chain of trust sources.
361 ifeq (${COT},tbbr)
laurenw-arm56f1e3e2021-03-03 14:19:38 -0600362 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
Manish V Badarkhe39317ab2020-07-23 10:43:57 +0100363 drivers/auth/tbbr/tbbr_cot_bl1.c
364 ifneq (${COT_DESC_IN_DTB},0)
365 BL2_SOURCES += lib/fconf/fconf_cot_getter.c
366 else
367 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
368 drivers/auth/tbbr/tbbr_cot_bl2.c
369 endif
Sandrine Bailleux012f8712020-02-06 14:59:33 +0100370 else ifeq (${COT},dualroot)
371 AUTH_SOURCES += drivers/auth/dualroot/cot.c
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100372 else
373 $(error Unknown chain of trust ${COT})
374 endif
Juan Castilloa08a5e72015-05-19 11:54:12 +0100375
Yatharth Kocharf11b29a2016-02-01 11:04:46 +0000376 BL1_SOURCES += ${AUTH_SOURCES} \
377 bl1/tbbr/tbbr_img_desc.c \
dp-armb3e85802016-12-12 14:48:13 +0000378 plat/arm/common/arm_bl1_fwu.c \
379 plat/common/tbbr/plat_tbbr.c
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100380
dp-armb3e85802016-12-12 14:48:13 +0000381 BL2_SOURCES += ${AUTH_SOURCES} \
Manish V Badarkhefe46f5f2020-05-27 09:39:42 +0100382 plat/common/tbbr/plat_tbbr.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100383
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900384 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
Yatharth Kochard1a93432015-10-12 12:33:47 +0100385
Juan Castilloa08a5e72015-05-19 11:54:12 +0100386 # We expect to locate the *.mk files under the directories specified below
Soby Mathew7e4d6652017-05-10 11:50:30 +0100387ifeq (${ARM_CRYPTOCELL_INTEG},0)
Juan Castilloa08a5e72015-05-19 11:54:12 +0100388 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
Soby Mathew7e4d6652017-05-10 11:50:30 +0100389else
390 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
391endif
Juan Castilloa08a5e72015-05-19 11:54:12 +0100392 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
393
394 $(info Including ${CRYPTO_LIB_MK})
395 include ${CRYPTO_LIB_MK}
396
397 $(info Including ${IMG_PARSER_LIB_MK})
398 include ${IMG_PARSER_LIB_MK}
399
400endif
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100401
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100402ifeq (${RECLAIM_INIT_CODE}, 1)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100403 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
404 $(error "To reclaim init code xlat tables v2 must be used")
405 endif
406endif
Alexei Fedorov71d81dc2020-07-13 13:58:06 +0100407
408ifeq (${MEASURED_BOOT},1)
Sandrine Bailleux3c2db6f2021-07-07 14:47:08 +0200409 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
Alexei Fedorov71d81dc2020-07-13 13:58:06 +0100410 $(info Including ${MEASURED_BOOT_MK})
411 include ${MEASURED_BOOT_MK}
412endif