| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __PLAT_MACROS_S__ |
| 8 | #define __PLAT_MACROS_S__ |
| 9 | |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 10 | #include <tegra_def.h> |
| 11 | |
| 12 | .section .rodata.gic_reg_name, "aS" |
| 13 | gicc_regs: |
| 14 | .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" |
| 15 | gicd_pend_reg: |
| 16 | .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" |
| 17 | newline: |
| 18 | .asciz "\n" |
| 19 | spacer: |
| 20 | .asciz ":\t\t0x" |
| 21 | |
| 22 | /* --------------------------------------------- |
| 23 | * The below macro prints out relevant GIC |
| 24 | * registers whenever an unhandled exception is |
| 25 | * taken in BL31. |
| 26 | * --------------------------------------------- |
| 27 | */ |
| Gerald Lejeune | 2c7ed5b | 2015-11-26 15:47:53 +0100 | [diff] [blame] | 28 | .macro plat_crash_print_regs |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 29 | mov_imm x16, TEGRA_GICC_BASE |
| Varun Wadekar | bfc6605 | 2016-08-23 14:01:19 -0700 | [diff] [blame] | 30 | |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 31 | /* gicc base address is now in x16 */ |
| 32 | adr x6, gicc_regs /* Load the gicc reg list to x6 */ |
| 33 | /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ |
| 34 | ldr w8, [x16, #GICC_HPPIR] |
| 35 | ldr w9, [x16, #GICC_AHPPIR] |
| 36 | ldr w10, [x16, #GICC_CTLR] |
| 37 | /* Store to the crash buf and print to cosole */ |
| 38 | bl str_in_crash_buf_print |
| 39 | |
| 40 | /* Print the GICD_ISPENDR regs */ |
| Varun Wadekar | bfc6605 | 2016-08-23 14:01:19 -0700 | [diff] [blame] | 41 | mov_imm x16, TEGRA_GICD_BASE |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 42 | add x7, x16, #GICD_ISPENDR |
| 43 | adr x4, gicd_pend_reg |
| 44 | bl asm_print_str |
| 45 | 2: |
| 46 | sub x4, x7, x16 |
| 47 | cmp x4, #0x280 |
| 48 | b.eq 1f |
| 49 | bl asm_print_hex |
| 50 | adr x4, spacer |
| 51 | bl asm_print_str |
| 52 | ldr x4, [x7], #8 |
| 53 | bl asm_print_hex |
| 54 | adr x4, newline |
| 55 | bl asm_print_str |
| 56 | b 2b |
| 57 | 1: |
| 58 | .endm |
| 59 | |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 60 | #endif /* __PLAT_MACROS_S__ */ |