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Achin Gupta191e86e2014-05-09 10:03:15 +01001/*
Jeenu Viswambharanf4194ee2018-01-10 15:00:20 +00002 * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
Achin Gupta191e86e2014-05-09 10:03:15 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta191e86e2014-05-09 10:03:15 +01005 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef INTERRUPT_MGMT_H
8#define INTERRUPT_MGMT_H
Achin Gupta191e86e2014-05-09 10:03:15 +01009
10#include <arch.h>
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +010011#include <utils_def.h>
Achin Gupta191e86e2014-05-09 10:03:15 +010012
13/*******************************************************************************
14 * Constants for the types of interrupts recognised by the IM framework
15 ******************************************************************************/
Varun Wadekarc6a11f62017-05-25 18:04:48 -070016#define INTR_TYPE_S_EL1 U(0)
17#define INTR_TYPE_EL3 U(1)
18#define INTR_TYPE_NS U(2)
19#define MAX_INTR_TYPES U(3)
Achin Gupta191e86e2014-05-09 10:03:15 +010020#define INTR_TYPE_INVAL MAX_INTR_TYPES
Jeenu Viswambharandce70b32017-09-22 08:32:09 +010021
22/* Interrupt routing modes */
23#define INTR_ROUTING_MODE_PE 0
24#define INTR_ROUTING_MODE_ANY 1
25
Achin Gupta191e86e2014-05-09 10:03:15 +010026/*
27 * Constant passed to the interrupt handler in the 'id' field when the
28 * framework does not read the gic registers to determine the interrupt id.
29 */
Varun Wadekarc6a11f62017-05-25 18:04:48 -070030#define INTR_ID_UNAVAILABLE U(0xFFFFFFFF)
Achin Gupta191e86e2014-05-09 10:03:15 +010031
32
33/*******************************************************************************
34 * Mask for _both_ the routing model bits in the 'flags' parameter and
35 * constants to define the valid routing models for each supported interrupt
36 * type
37 ******************************************************************************/
Varun Wadekarc6a11f62017-05-25 18:04:48 -070038#define INTR_RM_FLAGS_SHIFT U(0x0)
39#define INTR_RM_FLAGS_MASK U(0x3)
Achin Gupta191e86e2014-05-09 10:03:15 +010040/* Routed to EL3 from NS. Taken to S-EL1 from Secure */
Varun Wadekarc6a11f62017-05-25 18:04:48 -070041#define INTR_SEL1_VALID_RM0 U(0x2)
Achin Gupta191e86e2014-05-09 10:03:15 +010042/* Routed to EL3 from NS and Secure */
Varun Wadekarc6a11f62017-05-25 18:04:48 -070043#define INTR_SEL1_VALID_RM1 U(0x3)
Achin Gupta191e86e2014-05-09 10:03:15 +010044/* Routed to EL1/EL2 from NS and to S-EL1 from Secure */
Varun Wadekarc6a11f62017-05-25 18:04:48 -070045#define INTR_NS_VALID_RM0 U(0x0)
Achin Gupta191e86e2014-05-09 10:03:15 +010046/* Routed to EL1/EL2 from NS and to EL3 from Secure */
Varun Wadekarc6a11f62017-05-25 18:04:48 -070047#define INTR_NS_VALID_RM1 U(0x1)
Soby Mathew58e32d12015-11-23 13:58:45 +000048/* Routed to EL3 from NS. Taken to S-EL1 from Secure and handed over to EL3 */
Varun Wadekarc6a11f62017-05-25 18:04:48 -070049#define INTR_EL3_VALID_RM0 U(0x2)
Soby Mathew58e32d12015-11-23 13:58:45 +000050/* Routed to EL3 from NS and Secure */
Varun Wadekarc6a11f62017-05-25 18:04:48 -070051#define INTR_EL3_VALID_RM1 U(0x3)
Soby Mathew47903c02015-01-13 15:48:26 +000052/* This is the default routing model */
Varun Wadekarc6a11f62017-05-25 18:04:48 -070053#define INTR_DEFAULT_RM U(0x0)
Achin Gupta191e86e2014-05-09 10:03:15 +010054
55/*******************************************************************************
56 * Constants for the _individual_ routing model bits in the 'flags' field for
57 * each interrupt type and mask to validate the 'flags' parameter while
58 * registering an interrupt handler
59 ******************************************************************************/
Varun Wadekarc6a11f62017-05-25 18:04:48 -070060#define INTR_TYPE_FLAGS_MASK U(0xFFFFFFFC)
Achin Gupta191e86e2014-05-09 10:03:15 +010061
62#define INTR_RM_FROM_SEC_SHIFT SECURE /* BIT[0] */
63#define INTR_RM_FROM_NS_SHIFT NON_SECURE /* BIT[1] */
Varun Wadekarc6a11f62017-05-25 18:04:48 -070064#define INTR_RM_FROM_FLAG_MASK U(1)
Jeenu Viswambharan837cc9c2018-08-02 10:14:12 +010065#define get_interrupt_rm_flag(flag, ss) \
66 ((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK)
67#define set_interrupt_rm_flag(flag, ss) ((flag) |= U(1) << (ss))
68#define clr_interrupt_rm_flag(flag, ss) ((flag) &= ~(U(1) << (ss)))
Achin Gupta191e86e2014-05-09 10:03:15 +010069
Achin Gupta191e86e2014-05-09 10:03:15 +010070/*******************************************************************************
71 * Macros to set the 'flags' parameter passed to an interrupt type handler. Only
72 * the flag to indicate the security state when the exception was generated is
73 * supported.
74 ******************************************************************************/
Varun Wadekarc6a11f62017-05-25 18:04:48 -070075#define INTR_SRC_SS_FLAG_SHIFT U(0) /* BIT[0] */
76#define INTR_SRC_SS_FLAG_MASK U(1)
Jeenu Viswambharan32ceef52018-08-02 10:14:12 +010077#define set_interrupt_src_ss(flag, val) ((flag) |= (val) << INTR_SRC_SS_FLAG_SHIFT)
78#define clr_interrupt_src_ss(flag) ((flag) &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT))
79#define get_interrupt_src_ss(flag) (((flag) >> INTR_SRC_SS_FLAG_SHIFT) & \
Achin Gupta191e86e2014-05-09 10:03:15 +010080 INTR_SRC_SS_FLAG_MASK)
81
82#ifndef __ASSEMBLY__
83
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +010084#include <errno.h>
Jeenu Viswambharanaeb267c2017-09-22 08:32:09 +010085#include <stdint.h>
86
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +010087/*******************************************************************************
88 * Helpers to validate the routing model bits in the 'flags' for a type
89 * of interrupt. If the model does not match one of the valid masks
90 * -EINVAL is returned.
91 ******************************************************************************/
92static inline int32_t validate_sel1_interrupt_rm(uint32_t x)
93{
94 if ((x == INTR_SEL1_VALID_RM0) || (x == INTR_SEL1_VALID_RM1))
95 return 0;
96
97 return -EINVAL;
98}
99
100static inline int32_t validate_ns_interrupt_rm(uint32_t x)
101{
102 if ((x == INTR_NS_VALID_RM0) || (x == INTR_NS_VALID_RM1))
103 return 0;
104
105 return -EINVAL;
106}
107
108static inline int32_t validate_el3_interrupt_rm(uint32_t x)
109{
110#if EL3_EXCEPTION_HANDLING
111 /*
112 * With EL3 exception handling, EL3 interrupts are always routed to EL3
113 * from both Secure and Non-secure, and therefore INTR_EL3_VALID_RM1 is
114 * the only valid routing model.
115 */
116 if (x == INTR_EL3_VALID_RM1)
117 return 0;
118#else
119 if ((x == INTR_EL3_VALID_RM0) || (x == INTR_EL3_VALID_RM1))
120 return 0;
121#endif
122
123 return -EINVAL;
124}
125
126/*******************************************************************************
127 * Prototype for defining a handler for an interrupt type
128 ******************************************************************************/
Achin Gupta191e86e2014-05-09 10:03:15 +0100129typedef uint64_t (*interrupt_type_handler_t)(uint32_t id,
130 uint32_t flags,
131 void *handle,
132 void *cookie);
133
134/*******************************************************************************
135 * Function & variable prototypes
136 ******************************************************************************/
Dan Handleya17fefa2014-05-14 12:38:32 +0100137uint32_t get_scr_el3_from_routing_model(uint32_t security_state);
138int32_t set_routing_model(uint32_t type, uint32_t flags);
139int32_t register_interrupt_type_handler(uint32_t type,
140 interrupt_type_handler_t handler,
141 uint32_t flags);
Roberto Vargas777dd432018-02-12 12:36:17 +0000142interrupt_type_handler_t get_interrupt_type_handler(uint32_t type);
Soby Mathew47903c02015-01-13 15:48:26 +0000143int disable_intr_rm_local(uint32_t type, uint32_t security_state);
144int enable_intr_rm_local(uint32_t type, uint32_t security_state);
Achin Gupta191e86e2014-05-09 10:03:15 +0100145
146#endif /*__ASSEMBLY__*/
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +0000147#endif /* INTERRUPT_MGMT_H */