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Sandrine Bailleux798140d2014-07-17 16:06:39 +01001/*
2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch_helpers.h>
32#include <assert.h>
33#include <bl_common.h>
34#include <debug.h>
35#include <mmio.h>
36#include <platform.h>
37#include <platform_def.h>
38#include <xlat_tables.h>
39#include "../juno_def.h"
40
Soby Mathewb08bc042014-09-03 17:48:44 +010041#define MAP_MHU_SECURE MAP_REGION_FLAT(MHU_SECURE_BASE, \
42 MHU_SECURE_SIZE, \
43 (MHU_PAYLOAD_CACHED ? \
44 MT_MEMORY : MT_DEVICE) \
45 | MT_RW | MT_SECURE)
46
47#define MAP_FLASH MAP_REGION_FLAT(FLASH_BASE, \
48 FLASH_SIZE, \
49 MT_MEMORY | MT_RO | MT_SECURE)
50
51#define MAP_IOFPGA MAP_REGION_FLAT(IOFPGA_BASE, \
52 IOFPGA_SIZE, \
53 MT_DEVICE | MT_RW | MT_SECURE)
54
55#define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \
56 DEVICE0_SIZE, \
57 MT_DEVICE | MT_RW | MT_SECURE)
58
59#define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
60 DEVICE1_SIZE, \
61 MT_DEVICE | MT_RW | MT_SECURE)
62
63#define MAP_DRAM MAP_REGION_FLAT(DRAM_BASE, \
64 DRAM_SIZE, \
65 MT_MEMORY | MT_RW | MT_NS)
Sandrine Bailleux798140d2014-07-17 16:06:39 +010066/*
Soby Mathewb08bc042014-09-03 17:48:44 +010067 * Table of regions for different BL stages to map using the MMU.
Sandrine Bailleux798140d2014-07-17 16:06:39 +010068 * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
69 * configure_mmu_elx() will give the available subset of that,
70 */
Soby Mathewb08bc042014-09-03 17:48:44 +010071#if IMAGE_BL1
Sandrine Bailleux798140d2014-07-17 16:06:39 +010072static const mmap_region_t juno_mmap[] = {
Soby Mathewb08bc042014-09-03 17:48:44 +010073 MAP_MHU_SECURE,
74 MAP_FLASH,
75 MAP_IOFPGA,
76 MAP_DEVICE0,
77 MAP_DEVICE1,
Sandrine Bailleux798140d2014-07-17 16:06:39 +010078 {0}
79};
Soby Mathewb08bc042014-09-03 17:48:44 +010080#endif
81#if IMAGE_BL2
82static const mmap_region_t juno_mmap[] = {
83 MAP_MHU_SECURE,
84 MAP_FLASH,
85 MAP_IOFPGA,
86 MAP_DEVICE0,
87 MAP_DEVICE1,
88 MAP_DRAM,
89 {0}
90};
91#endif
92#if IMAGE_BL31
93static const mmap_region_t juno_mmap[] = {
94 MAP_MHU_SECURE,
95 MAP_IOFPGA,
96 MAP_DEVICE0,
97 MAP_DEVICE1,
98 {0}
99};
100#endif
101#if IMAGE_BL32
102static const mmap_region_t juno_mmap[] = {
103 MAP_IOFPGA,
104 MAP_DEVICE0,
105 MAP_DEVICE1,
106 {0}
107};
108#endif
Sandrine Bailleux798140d2014-07-17 16:06:39 +0100109
110/*******************************************************************************
111 * Macro generating the code for the function setting up the pagetables as per
112 * the platform memory map & initialize the mmu, for the given exception level
113 ******************************************************************************/
114#define DEFINE_CONFIGURE_MMU_EL(_el) \
115 void configure_mmu_el##_el(unsigned long total_base, \
116 unsigned long total_size, \
117 unsigned long ro_start, \
118 unsigned long ro_limit, \
119 unsigned long coh_start, \
120 unsigned long coh_limit) \
121 { \
122 mmap_add_region(total_base, total_base, \
123 total_size, \
124 MT_MEMORY | MT_RW | MT_SECURE); \
125 mmap_add_region(ro_start, ro_start, \
126 ro_limit - ro_start, \
127 MT_MEMORY | MT_RO | MT_SECURE); \
128 mmap_add_region(coh_start, coh_start, \
129 coh_limit - coh_start, \
130 MT_DEVICE | MT_RW | MT_SECURE); \
131 mmap_add(juno_mmap); \
132 init_xlat_tables(); \
133 \
134 enable_mmu_el##_el(0); \
135 }
136
137/* Define EL1 and EL3 variants of the function initialising the MMU */
138DEFINE_CONFIGURE_MMU_EL(1)
139DEFINE_CONFIGURE_MMU_EL(3)
140
141
142unsigned long plat_get_ns_image_entrypoint(void)
143{
144 return NS_IMAGE_OFFSET;
145}
146
147uint64_t plat_get_syscnt_freq(void)
148{
149 uint64_t counter_base_frequency;
150
151 /* Read the frequency from Frequency modes table */
152 counter_base_frequency = mmio_read_32(SYS_CNTCTL_BASE + CNTFID_OFF);
153
154 /* The first entry of the frequency modes table must not be 0 */
155 if (counter_base_frequency == 0)
156 panic();
157
158 return counter_base_frequency;
159}