Create BL stage specific translation tables

This patch uses the IMAGE_BL<x> constants to create translation tables specific
to a boot loader stage. This allows each stage to create mappings only for areas
in the memory map that it needs.

Fixes ARM-software/tf-issues#209

Change-Id: Ie4861407ddf9317f0fb890fc7575eaa88d0de51c
diff --git a/plat/juno/aarch64/juno_common.c b/plat/juno/aarch64/juno_common.c
index 5ba38c1..401f5fe 100644
--- a/plat/juno/aarch64/juno_common.c
+++ b/plat/juno/aarch64/juno_common.c
@@ -38,23 +38,74 @@
 #include <xlat_tables.h>
 #include "../juno_def.h"
 
+#define MAP_MHU_SECURE	MAP_REGION_FLAT(MHU_SECURE_BASE,		\
+					MHU_SECURE_SIZE,		\
+					(MHU_PAYLOAD_CACHED ?		\
+					 MT_MEMORY : MT_DEVICE)		\
+					| MT_RW | MT_SECURE)
+
+#define MAP_FLASH	MAP_REGION_FLAT(FLASH_BASE,			\
+					FLASH_SIZE,			\
+					MT_MEMORY | MT_RO | MT_SECURE)
+
+#define MAP_IOFPGA	MAP_REGION_FLAT(IOFPGA_BASE,			\
+					IOFPGA_SIZE,			\
+					MT_DEVICE | MT_RW | MT_SECURE)
+
+#define MAP_DEVICE0	MAP_REGION_FLAT(DEVICE0_BASE,			\
+					DEVICE0_SIZE,			\
+					MT_DEVICE | MT_RW | MT_SECURE)
+
+#define MAP_DEVICE1	MAP_REGION_FLAT(DEVICE1_BASE,			\
+					DEVICE1_SIZE,			\
+					MT_DEVICE | MT_RW | MT_SECURE)
+
+#define MAP_DRAM	MAP_REGION_FLAT(DRAM_BASE,			\
+					DRAM_SIZE,			\
+					MT_MEMORY | MT_RW | MT_NS)
 /*
- * Table of regions to map using the MMU.
+ * Table of regions for different BL stages to map using the MMU.
  * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
  * configure_mmu_elx() will give the available subset of that,
  */
+#if IMAGE_BL1
 static const mmap_region_t juno_mmap[] = {
-	{ TZROM_BASE,		TZROM_BASE,		TZROM_SIZE,		MT_MEMORY | MT_RO | MT_SECURE },
-	{ MHU_SECURE_BASE,	MHU_SECURE_BASE,	MHU_SECURE_SIZE,	(MHU_PAYLOAD_CACHED ? MT_MEMORY : MT_DEVICE) | MT_RW | MT_SECURE },
-	{ FLASH_BASE,		FLASH_BASE,		FLASH_SIZE,		MT_MEMORY | MT_RO | MT_SECURE },
-	{ EMMC_BASE,		EMMC_BASE,		EMMC_SIZE,		MT_MEMORY | MT_RO | MT_SECURE },
-	{ PSRAM_BASE,		PSRAM_BASE,		PSRAM_SIZE,		MT_MEMORY | MT_RW | MT_SECURE }, /* Used for 'TZDRAM' */
-	{ IOFPGA_BASE,		IOFPGA_BASE,		IOFPGA_SIZE,		MT_DEVICE | MT_RW | MT_SECURE },
-	{ DEVICE0_BASE,		DEVICE0_BASE,		DEVICE0_SIZE,		MT_DEVICE | MT_RW | MT_SECURE },
-	{ DEVICE1_BASE,		DEVICE1_BASE,		DEVICE1_SIZE,		MT_DEVICE | MT_RW | MT_SECURE },
-	{ DRAM_BASE,		DRAM_BASE,		DRAM_SIZE,		MT_MEMORY | MT_RW | MT_NS },
+	MAP_MHU_SECURE,
+	MAP_FLASH,
+	MAP_IOFPGA,
+	MAP_DEVICE0,
+	MAP_DEVICE1,
 	{0}
 };
+#endif
+#if IMAGE_BL2
+static const mmap_region_t juno_mmap[] = {
+	MAP_MHU_SECURE,
+	MAP_FLASH,
+	MAP_IOFPGA,
+	MAP_DEVICE0,
+	MAP_DEVICE1,
+	MAP_DRAM,
+	{0}
+};
+#endif
+#if IMAGE_BL31
+static const mmap_region_t juno_mmap[] = {
+	MAP_MHU_SECURE,
+	MAP_IOFPGA,
+	MAP_DEVICE0,
+	MAP_DEVICE1,
+	{0}
+};
+#endif
+#if IMAGE_BL32
+static const mmap_region_t juno_mmap[] = {
+	MAP_IOFPGA,
+	MAP_DEVICE0,
+	MAP_DEVICE1,
+	{0}
+};
+#endif
 
 /*******************************************************************************
  * Macro generating the code for the function setting up the pagetables as per