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Achin Gupta191e86e2014-05-09 10:03:15 +01001/*
2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta191e86e2014-05-09 10:03:15 +01005 */
6
7#ifndef __INTERRUPT_MGMT_H__
8#define __INTERRUPT_MGMT_H__
9
10#include <arch.h>
11
12/*******************************************************************************
13 * Constants for the types of interrupts recognised by the IM framework
14 ******************************************************************************/
15#define INTR_TYPE_S_EL1 0
16#define INTR_TYPE_EL3 1
17#define INTR_TYPE_NS 2
18#define MAX_INTR_TYPES 3
19#define INTR_TYPE_INVAL MAX_INTR_TYPES
20/*
21 * Constant passed to the interrupt handler in the 'id' field when the
22 * framework does not read the gic registers to determine the interrupt id.
23 */
24#define INTR_ID_UNAVAILABLE 0xFFFFFFFF
25
26
27/*******************************************************************************
28 * Mask for _both_ the routing model bits in the 'flags' parameter and
29 * constants to define the valid routing models for each supported interrupt
30 * type
31 ******************************************************************************/
32#define INTR_RM_FLAGS_SHIFT 0x0
33#define INTR_RM_FLAGS_MASK 0x3
34/* Routed to EL3 from NS. Taken to S-EL1 from Secure */
35#define INTR_SEL1_VALID_RM0 0x2
36/* Routed to EL3 from NS and Secure */
37#define INTR_SEL1_VALID_RM1 0x3
38/* Routed to EL1/EL2 from NS and to S-EL1 from Secure */
39#define INTR_NS_VALID_RM0 0x0
40/* Routed to EL1/EL2 from NS and to EL3 from Secure */
41#define INTR_NS_VALID_RM1 0x1
Soby Mathew58e32d12015-11-23 13:58:45 +000042/* Routed to EL3 from NS. Taken to S-EL1 from Secure and handed over to EL3 */
43#define INTR_EL3_VALID_RM0 0x2
44/* Routed to EL3 from NS and Secure */
45#define INTR_EL3_VALID_RM1 0x3
Soby Mathew47903c02015-01-13 15:48:26 +000046/* This is the default routing model */
47#define INTR_DEFAULT_RM 0x0
Achin Gupta191e86e2014-05-09 10:03:15 +010048
49/*******************************************************************************
50 * Constants for the _individual_ routing model bits in the 'flags' field for
51 * each interrupt type and mask to validate the 'flags' parameter while
52 * registering an interrupt handler
53 ******************************************************************************/
54#define INTR_TYPE_FLAGS_MASK 0xFFFFFFFC
55
56#define INTR_RM_FROM_SEC_SHIFT SECURE /* BIT[0] */
57#define INTR_RM_FROM_NS_SHIFT NON_SECURE /* BIT[1] */
58#define INTR_RM_FROM_FLAG_MASK 1
59#define get_interrupt_rm_flag(flag, ss) (((flag >> INTR_RM_FLAGS_SHIFT) >> ss) \
60 & INTR_RM_FROM_FLAG_MASK)
61#define set_interrupt_rm_flag(flag, ss) (flag |= 1 << ss)
62#define clr_interrupt_rm_flag(flag, ss) (flag &= ~(1 << ss))
63
64
65/*******************************************************************************
66 * Macros to validate the routing model bits in the 'flags' for a type
67 * of interrupt. If the model does not match one of the valid masks
68 * -EINVAL is returned.
69 ******************************************************************************/
Soby Mathew58e32d12015-11-23 13:58:45 +000070#define validate_sel1_interrupt_rm(x) ((x) == INTR_SEL1_VALID_RM0 ? 0 : \
71 ((x) == INTR_SEL1_VALID_RM1 ? 0 :\
Achin Gupta191e86e2014-05-09 10:03:15 +010072 -EINVAL))
73
Soby Mathew58e32d12015-11-23 13:58:45 +000074#define validate_ns_interrupt_rm(x) ((x) == INTR_NS_VALID_RM0 ? 0 : \
75 ((x) == INTR_NS_VALID_RM1 ? 0 :\
76 -EINVAL))
77
78#define validate_el3_interrupt_rm(x) ((x) == INTR_EL3_VALID_RM0 ? 0 : \
79 ((x) == INTR_EL3_VALID_RM1 ? 0 :\
Achin Gupta191e86e2014-05-09 10:03:15 +010080 -EINVAL))
81
82/*******************************************************************************
83 * Macros to set the 'flags' parameter passed to an interrupt type handler. Only
84 * the flag to indicate the security state when the exception was generated is
85 * supported.
86 ******************************************************************************/
87#define INTR_SRC_SS_FLAG_SHIFT 0 /* BIT[0] */
88#define INTR_SRC_SS_FLAG_MASK 1
89#define set_interrupt_src_ss(flag, val) (flag |= val << INTR_SRC_SS_FLAG_SHIFT)
90#define clr_interrupt_src_ss(flag) (flag &= ~(1 << INTR_SRC_SS_FLAG_SHIFT))
91#define get_interrupt_src_ss(flag) ((flag >> INTR_SRC_SS_FLAG_SHIFT) & \
92 INTR_SRC_SS_FLAG_MASK)
93
94#ifndef __ASSEMBLY__
95
96/* Prototype for defining a handler for an interrupt type */
97typedef uint64_t (*interrupt_type_handler_t)(uint32_t id,
98 uint32_t flags,
99 void *handle,
100 void *cookie);
101
102/*******************************************************************************
103 * Function & variable prototypes
104 ******************************************************************************/
Dan Handleya17fefa2014-05-14 12:38:32 +0100105uint32_t get_scr_el3_from_routing_model(uint32_t security_state);
106int32_t set_routing_model(uint32_t type, uint32_t flags);
107int32_t register_interrupt_type_handler(uint32_t type,
108 interrupt_type_handler_t handler,
109 uint32_t flags);
110interrupt_type_handler_t get_interrupt_type_handler(uint32_t interrupt_type);
Soby Mathew47903c02015-01-13 15:48:26 +0000111int disable_intr_rm_local(uint32_t type, uint32_t security_state);
112int enable_intr_rm_local(uint32_t type, uint32_t security_state);
Achin Gupta191e86e2014-05-09 10:03:15 +0100113
114#endif /*__ASSEMBLY__*/
115#endif /* __INTERRUPT_MGMT_H__ */