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Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001/*
Alexei Fedorov90f2e882019-05-24 12:17:09 +01002 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00005 */
6
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00007#include <assert.h>
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00008#include <errno.h>
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01009#include <stdbool.h>
Antonio Nino Diaz4b32e622018-08-16 16:52:57 +010010#include <stdint.h>
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000011#include <string.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000012
13#include <platform_def.h>
14
Alexei Fedorov90f2e882019-05-24 12:17:09 +010015#include <arch_features.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000016#include <arch_helpers.h>
17#include <common/debug.h>
18#include <lib/utils_def.h>
19#include <lib/xlat_tables/xlat_tables_defs.h>
20#include <lib/xlat_tables/xlat_tables_v2.h>
Sandrine Bailleux090c8492017-05-19 09:59:37 +010021
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000022#include "xlat_tables_private.h"
23
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +010024/* Helper function that cleans the data cache only if it is enabled. */
Varun Wadekar6bd85492019-01-30 08:31:07 -080025static inline __attribute__((unused)) void xlat_clean_dcache_range(uintptr_t addr, size_t size)
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +010026{
27 if (is_dcache_enabled())
28 clean_dcache_range(addr, size);
29}
30
Antonio Nino Diazac998032017-02-27 17:23:54 +000031#if PLAT_XLAT_TABLES_DYNAMIC
32
33/*
34 * The following functions assume that they will be called using subtables only.
35 * The base table can't be unmapped, so it is not needed to do any special
36 * handling for it.
37 */
38
39/*
40 * Returns the index of the array corresponding to the specified translation
41 * table.
42 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010043static int xlat_table_get_index(const xlat_ctx_t *ctx, const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000044{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010045 for (int i = 0; i < ctx->tables_num; i++)
Antonio Nino Diazac998032017-02-27 17:23:54 +000046 if (ctx->tables[i] == table)
47 return i;
48
49 /*
50 * Maybe we were asked to get the index of the base level table, which
51 * should never happen.
52 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010053 assert(false);
Antonio Nino Diazac998032017-02-27 17:23:54 +000054
55 return -1;
56}
57
58/* Returns a pointer to an empty translation table. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010059static uint64_t *xlat_table_get_empty(const xlat_ctx_t *ctx)
Antonio Nino Diazac998032017-02-27 17:23:54 +000060{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010061 for (int i = 0; i < ctx->tables_num; i++)
Antonio Nino Diazac998032017-02-27 17:23:54 +000062 if (ctx->tables_mapped_regions[i] == 0)
63 return ctx->tables[i];
64
65 return NULL;
66}
67
68/* Increments region count for a given table. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010069static void xlat_table_inc_regions_count(const xlat_ctx_t *ctx,
70 const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000071{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010072 int idx = xlat_table_get_index(ctx, table);
73
74 ctx->tables_mapped_regions[idx]++;
Antonio Nino Diazac998032017-02-27 17:23:54 +000075}
76
77/* Decrements region count for a given table. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010078static void xlat_table_dec_regions_count(const xlat_ctx_t *ctx,
79 const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000080{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010081 int idx = xlat_table_get_index(ctx, table);
82
83 ctx->tables_mapped_regions[idx]--;
Antonio Nino Diazac998032017-02-27 17:23:54 +000084}
85
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +010086/* Returns 0 if the specified table isn't empty, otherwise 1. */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010087static bool xlat_table_is_empty(const xlat_ctx_t *ctx, const uint64_t *table)
Antonio Nino Diazac998032017-02-27 17:23:54 +000088{
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010089 return ctx->tables_mapped_regions[xlat_table_get_index(ctx, table)] == 0;
Antonio Nino Diazac998032017-02-27 17:23:54 +000090}
91
92#else /* PLAT_XLAT_TABLES_DYNAMIC */
93
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000094/* Returns a pointer to the first empty translation table. */
95static uint64_t *xlat_table_get_empty(xlat_ctx_t *ctx)
96{
97 assert(ctx->next_table < ctx->tables_num);
98
99 return ctx->tables[ctx->next_table++];
100}
101
Antonio Nino Diazac998032017-02-27 17:23:54 +0000102#endif /* PLAT_XLAT_TABLES_DYNAMIC */
103
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100104/*
105 * Returns a block/page table descriptor for the given level and attributes.
106 */
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +0100107uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100108 unsigned long long addr_pa, unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000109{
110 uint64_t desc;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100111 uint32_t mem_type;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000112
113 /* Make sure that the granularity is fine enough to map this address. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100114 assert((addr_pa & XLAT_BLOCK_MASK(level)) == 0U);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000115
116 desc = addr_pa;
117 /*
118 * There are different translation table descriptors for level 3 and the
119 * rest.
120 */
121 desc |= (level == XLAT_TABLE_LEVEL_MAX) ? PAGE_DESC : BLOCK_DESC;
122 /*
Antonio Nino Diaz0842bd62018-07-12 15:54:10 +0100123 * Always set the access flag, as this library assumes access flag
124 * faults aren't managed.
125 */
126 desc |= LOWER_ATTRS(ACCESS_FLAG);
127 /*
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000128 * Deduce other fields of the descriptor based on the MT_NS and MT_RW
129 * memory region attributes.
130 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100131 desc |= ((attr & MT_NS) != 0U) ? LOWER_ATTRS(NS) : 0U;
132 desc |= ((attr & MT_RW) != 0U) ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000133
134 /*
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100135 * Do not allow unprivileged access when the mapping is for a privileged
136 * EL. For translation regimes that do not have mappings for access for
137 * lower exception levels, set AP[2] to AP_NO_ACCESS_UNPRIVILEGED.
138 */
139 if (ctx->xlat_regime == EL1_EL0_REGIME) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100140 if ((attr & MT_USER) != 0U) {
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100141 /* EL0 mapping requested, so we give User access */
142 desc |= LOWER_ATTRS(AP_ACCESS_UNPRIVILEGED);
143 } else {
144 /* EL1 mapping requested, no User access granted */
145 desc |= LOWER_ATTRS(AP_NO_ACCESS_UNPRIVILEGED);
146 }
147 } else {
Antonio Nino Diaz128de8d2018-08-07 19:59:49 +0100148 assert((ctx->xlat_regime == EL2_REGIME) ||
149 (ctx->xlat_regime == EL3_REGIME));
Antonio Nino Diaz49074492018-04-26 12:59:08 +0100150 desc |= LOWER_ATTRS(AP_ONE_VA_RANGE_RES1);
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100151 }
152
153 /*
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000154 * Deduce shareability domain and executability of the memory region
155 * from the memory type of the attributes (MT_TYPE).
156 *
157 * Data accesses to device memory and non-cacheable normal memory are
158 * coherent for all observers in the system, and correspondingly are
159 * always treated as being Outer Shareable. Therefore, for these 2 types
160 * of memory, it is not strictly needed to set the shareability field
161 * in the translation tables.
162 */
163 mem_type = MT_TYPE(attr);
164 if (mem_type == MT_DEVICE) {
165 desc |= LOWER_ATTRS(ATTR_DEVICE_INDEX | OSH);
166 /*
167 * Always map device memory as execute-never.
168 * This is to avoid the possibility of a speculative instruction
169 * fetch, which could be an issue if this memory region
170 * corresponds to a read-sensitive peripheral.
171 */
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100172 desc |= xlat_arch_regime_get_xn_desc(ctx->xlat_regime);
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100173
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000174 } else { /* Normal memory */
175 /*
176 * Always map read-write normal memory as execute-never.
Antonio Nino Diaz0842bd62018-07-12 15:54:10 +0100177 * This library assumes that it is used by software that does
178 * not self-modify its code, therefore R/W memory is reserved
179 * for data storage, which must not be executable.
180 *
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000181 * Note that setting the XN bit here is for consistency only.
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100182 * The function that enables the MMU sets the SCTLR_ELx.WXN bit,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000183 * which makes any writable memory region to be treated as
184 * execute-never, regardless of the value of the XN bit in the
185 * translation table.
186 *
187 * For read-only memory, rely on the MT_EXECUTE/MT_EXECUTE_NEVER
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100188 * attribute to figure out the value of the XN bit. The actual
189 * XN bit(s) to set in the descriptor depends on the context's
190 * translation regime and the policy applied in
191 * xlat_arch_regime_get_xn_desc().
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000192 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100193 if (((attr & MT_RW) != 0U) || ((attr & MT_EXECUTE_NEVER) != 0U)) {
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +0100194 desc |= xlat_arch_regime_get_xn_desc(ctx->xlat_regime);
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100195 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000196
197 if (mem_type == MT_MEMORY) {
198 desc |= LOWER_ATTRS(ATTR_IWBWA_OWBWA_NTR_INDEX | ISH);
Alexei Fedorov90f2e882019-05-24 12:17:09 +0100199
200 /* Check if Branch Target Identification is enabled */
201#if ENABLE_BTI
202 /* Set GP bit for block and page code entries
203 * if BTI mechanism is implemented.
204 */
205 if (is_armv8_5_bti_present() &&
206 ((attr & (MT_TYPE_MASK | MT_RW |
207 MT_EXECUTE_NEVER)) == MT_CODE)) {
208 desc |= GP;
209 }
210#endif
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000211 } else {
212 assert(mem_type == MT_NON_CACHEABLE);
213 desc |= LOWER_ATTRS(ATTR_NON_CACHEABLE_INDEX | OSH);
214 }
215 }
216
217 return desc;
218}
219
220/*
221 * Enumeration of actions that can be made when mapping table entries depending
222 * on the previous value in that entry and information about the region being
223 * mapped.
224 */
225typedef enum {
226
227 /* Do nothing */
228 ACTION_NONE,
229
230 /* Write a block (or page, if in level 3) entry. */
231 ACTION_WRITE_BLOCK_ENTRY,
232
233 /*
234 * Create a new table and write a table entry pointing to it. Recurse
235 * into it for further processing.
236 */
237 ACTION_CREATE_NEW_TABLE,
238
239 /*
240 * There is a table descriptor in this entry, read it and recurse into
241 * that table for further processing.
242 */
243 ACTION_RECURSE_INTO_TABLE,
244
245} action_t;
246
David Pu5619c802019-02-22 02:23:57 -0800247/*
248 * Function that returns the first VA of the table affected by the specified
249 * mmap region.
250 */
251static uintptr_t xlat_tables_find_start_va(mmap_region_t *mm,
252 const uintptr_t table_base_va,
253 const unsigned int level)
254{
255 uintptr_t table_idx_va;
256
257 if (mm->base_va > table_base_va) {
258 /* Find the first index of the table affected by the region. */
259 table_idx_va = mm->base_va & ~XLAT_BLOCK_MASK(level);
260 } else {
261 /* Start from the beginning of the table. */
262 table_idx_va = table_base_va;
263 }
264
265 return table_idx_va;
266}
267
268/*
269 * Function that returns table index for the given VA and level arguments.
270 */
271static inline unsigned int xlat_tables_va_to_index(const uintptr_t table_base_va,
272 const uintptr_t va,
273 const unsigned int level)
274{
275 return (unsigned int)((va - table_base_va) >> XLAT_ADDR_SHIFT(level));
276}
277
Antonio Nino Diazac998032017-02-27 17:23:54 +0000278#if PLAT_XLAT_TABLES_DYNAMIC
279
280/*
David Pu1507d412019-02-22 02:15:57 -0800281 * From the given arguments, it decides which action to take when unmapping the
282 * specified region.
283 */
284static action_t xlat_tables_unmap_region_action(const mmap_region_t *mm,
285 const uintptr_t table_idx_va, const uintptr_t table_idx_end_va,
286 const unsigned int level, const uint64_t desc_type)
287{
288 action_t action;
289 uintptr_t region_end_va = mm->base_va + mm->size - 1U;
290
291 if ((mm->base_va <= table_idx_va) &&
292 (region_end_va >= table_idx_end_va)) {
293 /* Region covers all block */
294
295 if (level == 3U) {
296 /*
297 * Last level, only page descriptors allowed,
298 * erase it.
299 */
300 assert(desc_type == PAGE_DESC);
301
302 action = ACTION_WRITE_BLOCK_ENTRY;
303 } else {
304 /*
305 * Other levels can have table descriptors. If
306 * so, recurse into it and erase descriptors
307 * inside it as needed. If there is a block
308 * descriptor, just erase it. If an invalid
309 * descriptor is found, this table isn't
310 * actually mapped, which shouldn't happen.
311 */
312 if (desc_type == TABLE_DESC) {
313 action = ACTION_RECURSE_INTO_TABLE;
314 } else {
315 assert(desc_type == BLOCK_DESC);
316 action = ACTION_WRITE_BLOCK_ENTRY;
317 }
318 }
319
320 } else if ((mm->base_va <= table_idx_end_va) ||
321 (region_end_va >= table_idx_va)) {
322 /*
323 * Region partially covers block.
324 *
325 * It can't happen in level 3.
326 *
327 * There must be a table descriptor here, if not there
328 * was a problem when mapping the region.
329 */
330 assert(level < 3U);
331 assert(desc_type == TABLE_DESC);
332
333 action = ACTION_RECURSE_INTO_TABLE;
334 } else {
335 /* The region doesn't cover the block at all */
336 action = ACTION_NONE;
337 }
338
339 return action;
340}
341/*
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000342 * Recursive function that writes to the translation tables and unmaps the
Antonio Nino Diazac998032017-02-27 17:23:54 +0000343 * specified region.
344 */
345static void xlat_tables_unmap_region(xlat_ctx_t *ctx, mmap_region_t *mm,
346 const uintptr_t table_base_va,
347 uint64_t *const table_base,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100348 const unsigned int table_entries,
Varun Wadekar66231d12017-06-07 09:57:42 -0700349 const unsigned int level)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000350{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100351 assert((level >= ctx->base_level) && (level <= XLAT_TABLE_LEVEL_MAX));
Antonio Nino Diazac998032017-02-27 17:23:54 +0000352
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000353 uint64_t *subtable;
354 uint64_t desc;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000355
356 uintptr_t table_idx_va;
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000357 uintptr_t table_idx_end_va; /* End VA of this entry */
Antonio Nino Diazac998032017-02-27 17:23:54 +0000358
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100359 uintptr_t region_end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000360
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000361 unsigned int table_idx;
362
David Pu5619c802019-02-22 02:23:57 -0800363 table_idx_va = xlat_tables_find_start_va(mm, table_base_va, level);
364 table_idx = xlat_tables_va_to_index(table_base_va, table_idx_va, level);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000365
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000366 while (table_idx < table_entries) {
David Puce81ba12019-02-22 02:36:20 -0800367
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000368 table_idx_end_va = table_idx_va + XLAT_BLOCK_SIZE(level) - 1U;
David Puce81ba12019-02-22 02:36:20 -0800369
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000370 desc = table_base[table_idx];
371 uint64_t desc_type = desc & DESC_MASK;
David Puce81ba12019-02-22 02:36:20 -0800372
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000373 action_t action = xlat_tables_unmap_region_action(mm,
374 table_idx_va, table_idx_end_va, level,
375 desc_type);
David Puce81ba12019-02-22 02:36:20 -0800376
377 if (action == ACTION_WRITE_BLOCK_ENTRY) {
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000378
379 table_base[table_idx] = INVALID_DESC;
Antonio Nino Diazad5dc7f2018-07-11 09:46:45 +0100380 xlat_arch_tlbi_va(table_idx_va, ctx->xlat_regime);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000381
382 } else if (action == ACTION_RECURSE_INTO_TABLE) {
383
384 subtable = (uint64_t *)(uintptr_t)(desc & TABLE_ADDR_MASK);
385
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000386 /* Recurse to write into subtable */
387 xlat_tables_unmap_region(ctx, mm, table_idx_va,
388 subtable, XLAT_TABLE_ENTRIES,
389 level + 1U);
390#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
391 xlat_clean_dcache_range((uintptr_t)subtable,
392 XLAT_TABLE_ENTRIES * sizeof(uint64_t));
393#endif
394 /*
395 * If the subtable is now empty, remove its reference.
396 */
397 if (xlat_table_is_empty(ctx, subtable)) {
398 table_base[table_idx] = INVALID_DESC;
399 xlat_arch_tlbi_va(table_idx_va,
400 ctx->xlat_regime);
401 }
David Puce81ba12019-02-22 02:36:20 -0800402
Antonio Nino Diazac998032017-02-27 17:23:54 +0000403 } else {
404 assert(action == ACTION_NONE);
David Puce81ba12019-02-22 02:36:20 -0800405 }
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000406
407 table_idx++;
408 table_idx_va += XLAT_BLOCK_SIZE(level);
409
410 /* If reached the end of the region, exit */
411 if (region_end_va <= table_idx_va)
412 break;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000413 }
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000414
415 if (level > ctx->base_level)
416 xlat_table_dec_regions_count(ctx, table_base);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000417}
418
419#endif /* PLAT_XLAT_TABLES_DYNAMIC */
420
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000421/*
422 * From the given arguments, it decides which action to take when mapping the
423 * specified region.
424 */
425static action_t xlat_tables_map_region_action(const mmap_region_t *mm,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100426 unsigned int desc_type, unsigned long long dest_pa,
427 uintptr_t table_entry_base_va, unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000428{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100429 uintptr_t mm_end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000430 uintptr_t table_entry_end_va =
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100431 table_entry_base_va + XLAT_BLOCK_SIZE(level) - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000432
433 /*
434 * The descriptor types allowed depend on the current table level.
435 */
436
437 if ((mm->base_va <= table_entry_base_va) &&
438 (mm_end_va >= table_entry_end_va)) {
439
440 /*
441 * Table entry is covered by region
442 * --------------------------------
443 *
444 * This means that this table entry can describe the whole
445 * translation with this granularity in principle.
446 */
447
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100448 if (level == 3U) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000449 /*
450 * Last level, only page descriptors are allowed.
451 */
452 if (desc_type == PAGE_DESC) {
453 /*
454 * There's another region mapped here, don't
455 * overwrite.
456 */
457 return ACTION_NONE;
458 } else {
459 assert(desc_type == INVALID_DESC);
460 return ACTION_WRITE_BLOCK_ENTRY;
461 }
462
463 } else {
464
465 /*
466 * Other levels. Table descriptors are allowed. Block
467 * descriptors too, but they have some limitations.
468 */
469
470 if (desc_type == TABLE_DESC) {
471 /* There's already a table, recurse into it. */
472 return ACTION_RECURSE_INTO_TABLE;
473
474 } else if (desc_type == INVALID_DESC) {
475 /*
476 * There's nothing mapped here, create a new
477 * entry.
478 *
479 * Check if the destination granularity allows
480 * us to use a block descriptor or we need a
481 * finer table for it.
482 *
483 * Also, check if the current level allows block
484 * descriptors. If not, create a table instead.
485 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100486 if (((dest_pa & XLAT_BLOCK_MASK(level)) != 0U)
487 || (level < MIN_LVL_BLOCK_DESC) ||
Sandrine Bailleux8f23fa82017-09-28 21:58:12 +0100488 (mm->granularity < XLAT_BLOCK_SIZE(level)))
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000489 return ACTION_CREATE_NEW_TABLE;
490 else
491 return ACTION_WRITE_BLOCK_ENTRY;
492
493 } else {
494 /*
495 * There's another region mapped here, don't
496 * overwrite.
497 */
498 assert(desc_type == BLOCK_DESC);
499
500 return ACTION_NONE;
501 }
502 }
503
504 } else if ((mm->base_va <= table_entry_end_va) ||
505 (mm_end_va >= table_entry_base_va)) {
506
507 /*
508 * Region partially covers table entry
509 * -----------------------------------
510 *
511 * This means that this table entry can't describe the whole
512 * translation, a finer table is needed.
513
514 * There cannot be partial block overlaps in level 3. If that
515 * happens, some of the preliminary checks when adding the
516 * mmap region failed to detect that PA and VA must at least be
517 * aligned to PAGE_SIZE.
518 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100519 assert(level < 3U);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000520
521 if (desc_type == INVALID_DESC) {
522 /*
523 * The block is not fully covered by the region. Create
524 * a new table, recurse into it and try to map the
525 * region with finer granularity.
526 */
527 return ACTION_CREATE_NEW_TABLE;
528
529 } else {
530 assert(desc_type == TABLE_DESC);
531 /*
532 * The block is not fully covered by the region, but
533 * there is already a table here. Recurse into it and
534 * try to map with finer granularity.
535 *
536 * PAGE_DESC for level 3 has the same value as
537 * TABLE_DESC, but this code can't run on a level 3
538 * table because there can't be overlaps in level 3.
539 */
540 return ACTION_RECURSE_INTO_TABLE;
541 }
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100542 } else {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000543
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100544 /*
545 * This table entry is outside of the region specified in the
546 * arguments, don't write anything to it.
547 */
548 return ACTION_NONE;
549 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000550}
551
552/*
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000553 * Recursive function that writes to the translation tables and maps the
Antonio Nino Diazac998032017-02-27 17:23:54 +0000554 * specified region. On success, it returns the VA of the last byte that was
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +0100555 * successfully mapped. On error, it returns the VA of the next entry that
Antonio Nino Diazac998032017-02-27 17:23:54 +0000556 * should have been mapped.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000557 */
Antonio Nino Diazac998032017-02-27 17:23:54 +0000558static uintptr_t xlat_tables_map_region(xlat_ctx_t *ctx, mmap_region_t *mm,
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000559 uintptr_t table_base_va,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000560 uint64_t *const table_base,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100561 unsigned int table_entries,
562 unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000563{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100564 assert((level >= ctx->base_level) && (level <= XLAT_TABLE_LEVEL_MAX));
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000565
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100566 uintptr_t mm_end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000567
568 uintptr_t table_idx_va;
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000569 unsigned long long table_idx_pa;
570
571 uint64_t *subtable;
572 uint64_t desc;
573
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100574 unsigned int table_idx;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000575
David Pu5619c802019-02-22 02:23:57 -0800576 table_idx_va = xlat_tables_find_start_va(mm, table_base_va, level);
577 table_idx = xlat_tables_va_to_index(table_base_va, table_idx_va, level);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000578
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000579#if PLAT_XLAT_TABLES_DYNAMIC
580 if (level > ctx->base_level)
581 xlat_table_inc_regions_count(ctx, table_base);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000582#endif
583
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000584 while (table_idx < table_entries) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000585
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000586 desc = table_base[table_idx];
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000587
588 table_idx_pa = mm->base_pa + table_idx_va - mm->base_va;
589
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000590 action_t action = xlat_tables_map_region_action(mm,
591 (uint32_t)(desc & DESC_MASK), table_idx_pa,
592 table_idx_va, level);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000593
David Pud1b7aa12019-02-22 02:31:40 -0800594 if (action == ACTION_WRITE_BLOCK_ENTRY) {
David Pud1b7aa12019-02-22 02:31:40 -0800595
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000596 table_base[table_idx] =
597 xlat_desc(ctx, (uint32_t)mm->attr, table_idx_pa,
598 level);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000599
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000600 } else if (action == ACTION_CREATE_NEW_TABLE) {
601 uintptr_t end_va;
602
603 subtable = xlat_table_get_empty(ctx);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000604 if (subtable == NULL) {
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000605 /* Not enough free tables to map this region */
Antonio Nino Diazac998032017-02-27 17:23:54 +0000606 return table_idx_va;
607 }
608
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000609 /* Point to new subtable from this one. */
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000610 table_base[table_idx] = TABLE_DESC | (unsigned long)subtable;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000611
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000612 /* Recurse to write into subtable */
613 end_va = xlat_tables_map_region(ctx, mm, table_idx_va,
614 subtable, XLAT_TABLE_ENTRIES,
615 level + 1U);
616#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
617 xlat_clean_dcache_range((uintptr_t)subtable,
618 XLAT_TABLE_ENTRIES * sizeof(uint64_t));
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100619#endif
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000620 if (end_va !=
621 (table_idx_va + XLAT_BLOCK_SIZE(level) - 1U))
622 return end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000623
David Pud1b7aa12019-02-22 02:31:40 -0800624 } else if (action == ACTION_RECURSE_INTO_TABLE) {
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000625 uintptr_t end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000626
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000627 subtable = (uint64_t *)(uintptr_t)(desc & TABLE_ADDR_MASK);
628 /* Recurse to write into subtable */
629 end_va = xlat_tables_map_region(ctx, mm, table_idx_va,
630 subtable, XLAT_TABLE_ENTRIES,
631 level + 1U);
632#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
633 xlat_clean_dcache_range((uintptr_t)subtable,
634 XLAT_TABLE_ENTRIES * sizeof(uint64_t));
David Pud1b7aa12019-02-22 02:31:40 -0800635#endif
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000636 if (end_va !=
637 (table_idx_va + XLAT_BLOCK_SIZE(level) - 1U))
638 return end_va;
639
David Pud1b7aa12019-02-22 02:31:40 -0800640 } else {
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000641
David Pud1b7aa12019-02-22 02:31:40 -0800642 assert(action == ACTION_NONE);
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000643
David Pud1b7aa12019-02-22 02:31:40 -0800644 }
Antonio Nino Diazff93d442019-03-19 14:12:09 +0000645
646 table_idx++;
647 table_idx_va += XLAT_BLOCK_SIZE(level);
648
649 /* If reached the end of the region, exit */
650 if (mm_end_va <= table_idx_va)
651 break;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000652 }
Antonio Nino Diazac998032017-02-27 17:23:54 +0000653
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100654 return table_idx_va - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000655}
656
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000657/*
658 * Function that verifies that a region can be mapped.
659 * Returns:
660 * 0: Success, the mapping is allowed.
661 * EINVAL: Invalid values were used as arguments.
662 * ERANGE: The memory limits were surpassed.
663 * ENOMEM: There is not enough memory in the mmap array.
664 * EPERM: Region overlaps another one in an invalid way.
665 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100666static int mmap_add_region_check(const xlat_ctx_t *ctx, const mmap_region_t *mm)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000667{
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100668 unsigned long long base_pa = mm->base_pa;
669 uintptr_t base_va = mm->base_va;
670 size_t size = mm->size;
Sandrine Bailleux8f23fa82017-09-28 21:58:12 +0100671 size_t granularity = mm->granularity;
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100672
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100673 unsigned long long end_pa = base_pa + size - 1U;
674 uintptr_t end_va = base_va + size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000675
676 if (!IS_PAGE_ALIGNED(base_pa) || !IS_PAGE_ALIGNED(base_va) ||
677 !IS_PAGE_ALIGNED(size))
678 return -EINVAL;
679
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100680 if ((granularity != XLAT_BLOCK_SIZE(1U)) &&
681 (granularity != XLAT_BLOCK_SIZE(2U)) &&
682 (granularity != XLAT_BLOCK_SIZE(3U))) {
Sandrine Bailleux8f23fa82017-09-28 21:58:12 +0100683 return -EINVAL;
684 }
685
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000686 /* Check for overflows */
687 if ((base_pa > end_pa) || (base_va > end_va))
688 return -ERANGE;
689
690 if ((base_va + (uintptr_t)size - (uintptr_t)1) > ctx->va_max_address)
691 return -ERANGE;
692
693 if ((base_pa + (unsigned long long)size - 1ULL) > ctx->pa_max_address)
694 return -ERANGE;
695
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100696 /* Check that there is space in the ctx->mmap array */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100697 if (ctx->mmap[ctx->mmap_num - 1].size != 0U)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000698 return -ENOMEM;
699
700 /* Check for PAs and VAs overlaps with all other regions */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100701 for (const mmap_region_t *mm_cursor = ctx->mmap;
702 mm_cursor->size != 0U; ++mm_cursor) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000703
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100704 uintptr_t mm_cursor_end_va = mm_cursor->base_va
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100705 + mm_cursor->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000706
707 /*
708 * Check if one of the regions is completely inside the other
709 * one.
710 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100711 bool fully_overlapped_va =
712 ((base_va >= mm_cursor->base_va) &&
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100713 (end_va <= mm_cursor_end_va)) ||
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100714 ((mm_cursor->base_va >= base_va) &&
715 (mm_cursor_end_va <= end_va));
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000716
717 /*
718 * Full VA overlaps are only allowed if both regions are
719 * identity mapped (zero offset) or have the same VA to PA
720 * offset. Also, make sure that it's not the exact same area.
Antonio Nino Diazac998032017-02-27 17:23:54 +0000721 * This can only be done with static regions.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000722 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100723 if (fully_overlapped_va) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000724
Antonio Nino Diazac998032017-02-27 17:23:54 +0000725#if PLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100726 if (((mm->attr & MT_DYNAMIC) != 0U) ||
727 ((mm_cursor->attr & MT_DYNAMIC) != 0U))
Antonio Nino Diazac998032017-02-27 17:23:54 +0000728 return -EPERM;
729#endif /* PLAT_XLAT_TABLES_DYNAMIC */
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100730 if ((mm_cursor->base_va - mm_cursor->base_pa) !=
731 (base_va - base_pa))
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000732 return -EPERM;
733
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100734 if ((base_va == mm_cursor->base_va) &&
735 (size == mm_cursor->size))
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000736 return -EPERM;
737
738 } else {
739 /*
740 * If the regions do not have fully overlapping VAs,
741 * then they must have fully separated VAs and PAs.
742 * Partial overlaps are not allowed
743 */
744
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100745 unsigned long long mm_cursor_end_pa =
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100746 mm_cursor->base_pa + mm_cursor->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000747
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100748 bool separated_pa = (end_pa < mm_cursor->base_pa) ||
749 (base_pa > mm_cursor_end_pa);
750 bool separated_va = (end_va < mm_cursor->base_va) ||
751 (base_va > mm_cursor_end_va);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000752
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100753 if (!separated_va || !separated_pa)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000754 return -EPERM;
755 }
756 }
757
758 return 0;
759}
760
Sandrine Bailleux66342932017-07-18 13:26:36 +0100761void mmap_add_region_ctx(xlat_ctx_t *ctx, const mmap_region_t *mm)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000762{
John Tsichritzisfdd92482018-05-25 09:12:48 +0100763 mmap_region_t *mm_cursor = ctx->mmap, *mm_destination;
Varun Wadekarccbd2e32018-04-03 10:44:41 -0700764 const mmap_region_t *mm_end = ctx->mmap + ctx->mmap_num;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100765 const mmap_region_t *mm_last;
766 unsigned long long end_pa = mm->base_pa + mm->size - 1U;
767 uintptr_t end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000768 int ret;
769
770 /* Ignore empty regions */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100771 if (mm->size == 0U)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000772 return;
773
Antonio Nino Diazac998032017-02-27 17:23:54 +0000774 /* Static regions must be added before initializing the xlat tables. */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100775 assert(!ctx->initialized);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000776
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100777 ret = mmap_add_region_check(ctx, mm);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000778 if (ret != 0) {
779 ERROR("mmap_add_region_check() failed. error %d\n", ret);
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100780 assert(false);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000781 return;
782 }
783
784 /*
785 * Find correct place in mmap to insert new region.
786 *
787 * 1 - Lower region VA end first.
788 * 2 - Smaller region size first.
789 *
790 * VA 0 0xFF
791 *
792 * 1st |------|
793 * 2nd |------------|
794 * 3rd |------|
795 * 4th |---|
796 * 5th |---|
797 * 6th |----------|
798 * 7th |-------------------------------------|
799 *
800 * This is required for overlapping regions only. It simplifies adding
801 * regions with the loop in xlat_tables_init_internal because the outer
802 * ones won't overwrite block or page descriptors of regions added
803 * previously.
Antonio Nino Diazac998032017-02-27 17:23:54 +0000804 *
805 * Overlapping is only allowed for static regions.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000806 */
807
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100808 while (((mm_cursor->base_va + mm_cursor->size - 1U) < end_va)
809 && (mm_cursor->size != 0U)) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000810 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100811 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000812
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100813 while (((mm_cursor->base_va + mm_cursor->size - 1U) == end_va) &&
814 (mm_cursor->size != 0U) && (mm_cursor->size < mm->size)) {
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000815 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100816 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000817
Varun Wadekarccbd2e32018-04-03 10:44:41 -0700818 /*
819 * Find the last entry marker in the mmap
820 */
821 mm_last = ctx->mmap;
822 while ((mm_last->size != 0U) && (mm_last < mm_end)) {
823 ++mm_last;
824 }
825
826 /*
827 * Check if we have enough space in the memory mapping table.
828 * This shouldn't happen as we have checked in mmap_add_region_check
829 * that there is free space.
830 */
831 assert(mm_last->size == 0U);
Jeenu Viswambharan58e81482018-04-27 15:06:57 +0100832
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000833 /* Make room for new region by moving other regions up by one place */
John Tsichritzisfdd92482018-05-25 09:12:48 +0100834 mm_destination = mm_cursor + 1;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100835 (void)memmove(mm_destination, mm_cursor,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000836 (uintptr_t)mm_last - (uintptr_t)mm_cursor);
837
838 /*
839 * Check we haven't lost the empty sentinel from the end of the array.
840 * This shouldn't happen as we have checked in mmap_add_region_check
841 * that there is free space.
842 */
Varun Wadekarccbd2e32018-04-03 10:44:41 -0700843 assert(mm_end->size == 0U);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000844
Douglas Raillardf68d2ed2017-09-12 10:31:49 +0100845 *mm_cursor = *mm;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000846
847 if (end_pa > ctx->max_pa)
848 ctx->max_pa = end_pa;
849 if (end_va > ctx->max_va)
850 ctx->max_va = end_va;
851}
852
Antonio Nino Diazc0033282018-11-20 16:03:11 +0000853/*
854 * Determine the table level closest to the initial lookup level that
855 * can describe this translation. Then, align base VA to the next block
856 * at the determined level.
857 */
858static void mmap_alloc_va_align_ctx(xlat_ctx_t *ctx, mmap_region_t *mm)
859{
860 /*
861 * By or'ing the size and base PA the alignment will be the one
862 * corresponding to the smallest boundary of the two of them.
863 *
864 * There are three different cases. For example (for 4 KiB page size):
865 *
866 * +--------------+------------------++--------------+
867 * | PA alignment | Size multiple of || VA alignment |
868 * +--------------+------------------++--------------+
869 * | 2 MiB | 2 MiB || 2 MiB | (1)
870 * | 2 MiB | 4 KiB || 4 KiB | (2)
871 * | 4 KiB | 2 MiB || 4 KiB | (3)
872 * +--------------+------------------++--------------+
873 *
874 * - In (1), it is possible to take advantage of the alignment of the PA
875 * and the size of the region to use a level 2 translation table
876 * instead of a level 3 one.
877 *
878 * - In (2), the size is smaller than a block entry of level 2, so it is
879 * needed to use a level 3 table to describe the region or the library
880 * will map more memory than the desired one.
881 *
882 * - In (3), even though the region has the size of one level 2 block
883 * entry, it isn't possible to describe the translation with a level 2
884 * block entry because of the alignment of the base PA.
885 *
886 * Only bits 47:21 of a level 2 block descriptor are used by the MMU,
887 * bits 20:0 of the resulting address are 0 in this case. Because of
888 * this, the PA generated as result of this translation is aligned to
889 * 2 MiB. The PA that was requested to be mapped is aligned to 4 KiB,
890 * though, which means that the resulting translation is incorrect.
891 * The only way to prevent this is by using a finer granularity.
892 */
893 unsigned long long align_check;
894
895 align_check = mm->base_pa | (unsigned long long)mm->size;
896
897 /*
898 * Assume it is always aligned to level 3. There's no need to check that
899 * level because its block size is PAGE_SIZE. The checks to verify that
900 * the addresses and size are aligned to PAGE_SIZE are inside
901 * mmap_add_region.
902 */
903 for (unsigned int level = ctx->base_level; level <= 2U; ++level) {
904
905 if ((align_check & XLAT_BLOCK_MASK(level)) != 0U)
906 continue;
907
908 mm->base_va = round_up(mm->base_va, XLAT_BLOCK_SIZE(level));
909 return;
910 }
911}
912
913void mmap_add_region_alloc_va_ctx(xlat_ctx_t *ctx, mmap_region_t *mm)
914{
915 mm->base_va = ctx->max_va + 1UL;
916
917 assert(mm->size > 0U);
918
919 mmap_alloc_va_align_ctx(ctx, mm);
920
921 /* Detect overflows. More checks are done in mmap_add_region_check(). */
922 assert(mm->base_va > ctx->max_va);
923
924 mmap_add_region_ctx(ctx, mm);
925}
926
Sandrine Bailleux66342932017-07-18 13:26:36 +0100927void mmap_add_ctx(xlat_ctx_t *ctx, const mmap_region_t *mm)
928{
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100929 const mmap_region_t *mm_cursor = mm;
930
Antonio Nino Diaz2cb864c2018-10-08 16:11:11 +0100931 while (mm_cursor->granularity != 0U) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100932 mmap_add_region_ctx(ctx, mm_cursor);
933 mm_cursor++;
Sandrine Bailleux66342932017-07-18 13:26:36 +0100934 }
935}
936
Antonio Nino Diazac998032017-02-27 17:23:54 +0000937#if PLAT_XLAT_TABLES_DYNAMIC
938
939int mmap_add_dynamic_region_ctx(xlat_ctx_t *ctx, mmap_region_t *mm)
940{
941 mmap_region_t *mm_cursor = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100942 const mmap_region_t *mm_last = mm_cursor + ctx->mmap_num;
943 unsigned long long end_pa = mm->base_pa + mm->size - 1U;
944 uintptr_t end_va = mm->base_va + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000945 int ret;
946
947 /* Nothing to do */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100948 if (mm->size == 0U)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000949 return 0;
950
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100951 /* Now this region is a dynamic one */
952 mm->attr |= MT_DYNAMIC;
953
954 ret = mmap_add_region_check(ctx, mm);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000955 if (ret != 0)
956 return ret;
957
958 /*
959 * Find the adequate entry in the mmap array in the same way done for
960 * static regions in mmap_add_region_ctx().
961 */
962
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100963 while (((mm_cursor->base_va + mm_cursor->size - 1U) < end_va)
964 && (mm_cursor->size != 0U)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000965 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100966 }
Antonio Nino Diazac998032017-02-27 17:23:54 +0000967
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100968 while (((mm_cursor->base_va + mm_cursor->size - 1U) == end_va) &&
969 (mm_cursor->size != 0U) && (mm_cursor->size < mm->size)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +0000970 ++mm_cursor;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100971 }
Antonio Nino Diazac998032017-02-27 17:23:54 +0000972
973 /* Make room for new region by moving other regions up by one place */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100974 (void)memmove(mm_cursor + 1U, mm_cursor,
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100975 (uintptr_t)mm_last - (uintptr_t)mm_cursor);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000976
977 /*
978 * Check we haven't lost the empty sentinal from the end of the array.
979 * This shouldn't happen as we have checked in mmap_add_region_check
980 * that there is free space.
981 */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100982 assert(mm_last->size == 0U);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000983
Douglas Raillardf68d2ed2017-09-12 10:31:49 +0100984 *mm_cursor = *mm;
Antonio Nino Diazac998032017-02-27 17:23:54 +0000985
986 /*
987 * Update the translation tables if the xlat tables are initialized. If
988 * not, this region will be mapped when they are initialized.
989 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +0100990 if (ctx->initialized) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100991 end_va = xlat_tables_map_region(ctx, mm_cursor,
992 0U, ctx->base_table, ctx->base_table_entries,
Douglas Raillard6a5f8f12017-09-21 08:42:21 +0100993 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100994#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
995 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
996 ctx->base_table_entries * sizeof(uint64_t));
997#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +0000998 /* Failed to map, remove mmap entry, unmap and return error. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100999 if (end_va != (mm_cursor->base_va + mm_cursor->size - 1U)) {
1000 (void)memmove(mm_cursor, mm_cursor + 1U,
Douglas Raillard6a5f8f12017-09-21 08:42:21 +01001001 (uintptr_t)mm_last - (uintptr_t)mm_cursor);
Antonio Nino Diazac998032017-02-27 17:23:54 +00001002
1003 /*
1004 * Check if the mapping function actually managed to map
1005 * anything. If not, just return now.
1006 */
Antonio Nino Diaz3f518922018-01-05 11:30:36 +00001007 if (mm->base_va >= end_va)
Antonio Nino Diazac998032017-02-27 17:23:54 +00001008 return -ENOMEM;
1009
1010 /*
Douglas Raillard6a5f8f12017-09-21 08:42:21 +01001011 * Something went wrong after mapping some table
1012 * entries, undo every change done up to this point.
Antonio Nino Diazac998032017-02-27 17:23:54 +00001013 */
1014 mmap_region_t unmap_mm = {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001015 .base_pa = 0U,
Antonio Nino Diazac998032017-02-27 17:23:54 +00001016 .base_va = mm->base_va,
1017 .size = end_va - mm->base_va,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001018 .attr = 0U
Antonio Nino Diazac998032017-02-27 17:23:54 +00001019 };
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001020 xlat_tables_unmap_region(ctx, &unmap_mm, 0U,
1021 ctx->base_table, ctx->base_table_entries,
1022 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +01001023#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
1024 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
1025 ctx->base_table_entries * sizeof(uint64_t));
1026#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +00001027 return -ENOMEM;
1028 }
1029
1030 /*
1031 * Make sure that all entries are written to the memory. There
1032 * is no need to invalidate entries when mapping dynamic regions
1033 * because new table/block/page descriptors only replace old
1034 * invalid descriptors, that aren't TLB cached.
1035 */
1036 dsbishst();
1037 }
1038
1039 if (end_pa > ctx->max_pa)
1040 ctx->max_pa = end_pa;
1041 if (end_va > ctx->max_va)
1042 ctx->max_va = end_va;
1043
1044 return 0;
1045}
1046
Antonio Nino Diazc0033282018-11-20 16:03:11 +00001047int mmap_add_dynamic_region_alloc_va_ctx(xlat_ctx_t *ctx, mmap_region_t *mm)
1048{
1049 mm->base_va = ctx->max_va + 1UL;
1050
1051 if (mm->size == 0U)
1052 return 0;
1053
1054 mmap_alloc_va_align_ctx(ctx, mm);
1055
1056 /* Detect overflows. More checks are done in mmap_add_region_check(). */
1057 if (mm->base_va < ctx->max_va) {
1058 return -ENOMEM;
1059 }
1060
1061 return mmap_add_dynamic_region_ctx(ctx, mm);
1062}
1063
Antonio Nino Diazac998032017-02-27 17:23:54 +00001064/*
1065 * Removes the region with given base Virtual Address and size from the given
1066 * context.
1067 *
1068 * Returns:
1069 * 0: Success.
1070 * EINVAL: Invalid values were used as arguments (region not found).
1071 * EPERM: Tried to remove a static region.
1072 */
1073int mmap_remove_dynamic_region_ctx(xlat_ctx_t *ctx, uintptr_t base_va,
1074 size_t size)
1075{
1076 mmap_region_t *mm = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001077 const mmap_region_t *mm_last = mm + ctx->mmap_num;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001078 int update_max_va_needed = 0;
1079 int update_max_pa_needed = 0;
1080
1081 /* Check sanity of mmap array. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001082 assert(mm[ctx->mmap_num].size == 0U);
Antonio Nino Diazac998032017-02-27 17:23:54 +00001083
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001084 while (mm->size != 0U) {
Antonio Nino Diazac998032017-02-27 17:23:54 +00001085 if ((mm->base_va == base_va) && (mm->size == size))
1086 break;
1087 ++mm;
1088 }
1089
1090 /* Check that the region was found */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001091 if (mm->size == 0U)
Antonio Nino Diazac998032017-02-27 17:23:54 +00001092 return -EINVAL;
1093
1094 /* If the region is static it can't be removed */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001095 if ((mm->attr & MT_DYNAMIC) == 0U)
Antonio Nino Diazac998032017-02-27 17:23:54 +00001096 return -EPERM;
1097
1098 /* Check if this region is using the top VAs or PAs. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001099 if ((mm->base_va + mm->size - 1U) == ctx->max_va)
Antonio Nino Diazac998032017-02-27 17:23:54 +00001100 update_max_va_needed = 1;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001101 if ((mm->base_pa + mm->size - 1U) == ctx->max_pa)
Antonio Nino Diazac998032017-02-27 17:23:54 +00001102 update_max_pa_needed = 1;
1103
1104 /* Update the translation tables if needed */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001105 if (ctx->initialized) {
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001106 xlat_tables_unmap_region(ctx, mm, 0U, ctx->base_table,
Antonio Nino Diazac998032017-02-27 17:23:54 +00001107 ctx->base_table_entries,
1108 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +01001109#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
1110 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
1111 ctx->base_table_entries * sizeof(uint64_t));
1112#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +00001113 xlat_arch_tlbi_va_sync();
1114 }
1115
1116 /* Remove this region by moving the rest down by one place. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001117 (void)memmove(mm, mm + 1U, (uintptr_t)mm_last - (uintptr_t)mm);
Antonio Nino Diazac998032017-02-27 17:23:54 +00001118
1119 /* Check if we need to update the max VAs and PAs */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001120 if (update_max_va_needed == 1) {
1121 ctx->max_va = 0U;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001122 mm = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001123 while (mm->size != 0U) {
1124 if ((mm->base_va + mm->size - 1U) > ctx->max_va)
1125 ctx->max_va = mm->base_va + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001126 ++mm;
1127 }
1128 }
1129
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001130 if (update_max_pa_needed == 1) {
1131 ctx->max_pa = 0U;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001132 mm = ctx->mmap;
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001133 while (mm->size != 0U) {
1134 if ((mm->base_pa + mm->size - 1U) > ctx->max_pa)
1135 ctx->max_pa = mm->base_pa + mm->size - 1U;
Antonio Nino Diazac998032017-02-27 17:23:54 +00001136 ++mm;
1137 }
1138 }
1139
1140 return 0;
1141}
1142
Antonio Nino Diaz675d1552018-10-30 11:36:47 +00001143void xlat_setup_dynamic_ctx(xlat_ctx_t *ctx, unsigned long long pa_max,
1144 uintptr_t va_max, struct mmap_region *mmap,
1145 unsigned int mmap_num, uint64_t **tables,
1146 unsigned int tables_num, uint64_t *base_table,
1147 int xlat_regime, int *mapped_regions)
1148{
1149 ctx->xlat_regime = xlat_regime;
1150
1151 ctx->pa_max_address = pa_max;
1152 ctx->va_max_address = va_max;
1153
1154 ctx->mmap = mmap;
1155 ctx->mmap_num = mmap_num;
1156 memset(ctx->mmap, 0, sizeof(struct mmap_region) * mmap_num);
1157
1158 ctx->tables = (void *) tables;
1159 ctx->tables_num = tables_num;
1160
1161 uintptr_t va_space_size = va_max + 1;
1162 ctx->base_level = GET_XLAT_TABLE_LEVEL_BASE(va_space_size);
1163 ctx->base_table = base_table;
1164 ctx->base_table_entries = GET_NUM_BASE_LEVEL_ENTRIES(va_space_size);
1165
1166 ctx->tables_mapped_regions = mapped_regions;
1167
1168 ctx->max_pa = 0;
1169 ctx->max_va = 0;
1170 ctx->initialized = 0;
1171}
1172
Antonio Nino Diazac998032017-02-27 17:23:54 +00001173#endif /* PLAT_XLAT_TABLES_DYNAMIC */
1174
Daniel Boulby5a03a252018-08-30 16:48:56 +01001175void __init init_xlat_tables_ctx(xlat_ctx_t *ctx)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001176{
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +01001177 assert(ctx != NULL);
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001178 assert(!ctx->initialized);
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001179 assert((ctx->xlat_regime == EL3_REGIME) ||
Antonio Nino Diaz128de8d2018-08-07 19:59:49 +01001180 (ctx->xlat_regime == EL2_REGIME) ||
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001181 (ctx->xlat_regime == EL1_EL0_REGIME));
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001182 assert(!is_mmu_enabled_ctx(ctx));
Sandrine Bailleux66342932017-07-18 13:26:36 +01001183
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +01001184 mmap_region_t *mm = ctx->mmap;
Sandrine Bailleux66342932017-07-18 13:26:36 +01001185
Sathees Balya74155972019-01-25 11:36:01 +00001186 assert(ctx->va_max_address >=
1187 (xlat_get_min_virt_addr_space_size() - 1U));
1188 assert(ctx->va_max_address <= (MAX_VIRT_ADDR_SPACE_SIZE - 1U));
1189 assert(IS_POWER_OF_TWO(ctx->va_max_address + 1U));
1190
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +01001191 xlat_mmap_print(mm);
Sandrine Bailleux66342932017-07-18 13:26:36 +01001192
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001193 /* All tables must be zeroed before mapping any region. */
1194
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001195 for (unsigned int i = 0U; i < ctx->base_table_entries; i++)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001196 ctx->base_table[i] = INVALID_DESC;
1197
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001198 for (int j = 0; j < ctx->tables_num; j++) {
Antonio Nino Diazac998032017-02-27 17:23:54 +00001199#if PLAT_XLAT_TABLES_DYNAMIC
1200 ctx->tables_mapped_regions[j] = 0;
1201#endif
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001202 for (unsigned int i = 0U; i < XLAT_TABLE_ENTRIES; i++)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001203 ctx->tables[j][i] = INVALID_DESC;
1204 }
1205
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001206 while (mm->size != 0U) {
1207 uintptr_t end_va = xlat_tables_map_region(ctx, mm, 0U,
1208 ctx->base_table, ctx->base_table_entries,
1209 ctx->base_level);
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +01001210#if !(HW_ASSISTED_COHERENCY || WARMBOOT_ENABLE_DCACHE_EARLY)
1211 xlat_clean_dcache_range((uintptr_t)ctx->base_table,
1212 ctx->base_table_entries * sizeof(uint64_t));
1213#endif
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001214 if (end_va != (mm->base_va + mm->size - 1U)) {
Antonio Nino Diazac998032017-02-27 17:23:54 +00001215 ERROR("Not enough memory to map region:\n"
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01001216 " VA:0x%lx PA:0x%llx size:0x%zx attr:0x%x\n",
1217 mm->base_va, mm->base_pa, mm->size, mm->attr);
Antonio Nino Diazac998032017-02-27 17:23:54 +00001218 panic();
1219 }
1220
1221 mm++;
1222 }
1223
Sandrine Bailleux46c53a22017-07-11 15:11:10 +01001224 assert(ctx->pa_max_address <= xlat_arch_get_max_supported_pa());
Sandrine Bailleux66342932017-07-18 13:26:36 +01001225 assert(ctx->max_va <= ctx->va_max_address);
1226 assert(ctx->max_pa <= ctx->pa_max_address);
1227
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +01001228 ctx->initialized = true;
Sandrine Bailleuxc5b63772017-05-31 13:31:48 +01001229
1230 xlat_tables_print(ctx);
Sandrine Bailleux66342932017-07-18 13:26:36 +01001231}