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git01.mediatek.com / filogic / atf / 67f11f096d53c6ca5a3f116ae6aff250f7c8ccd5 / . / plat / intel / soc / agilex / platform.mk
blob: ccb4e071f046900524771e7daba0551de91a2c76 [file] [log] [blame]
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]1#
Abdul Halim, Muhammad Hadi Asyrafif3a5d022020-06-29 12:15:27 +0800[diff] [blame]2# Copyright (c) 2019-2022, ARM Limited and Contributors. All rights reserved.
3# Copyright (c) 2019-2022, Intel Corporation. All rights reserved.
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]4#
5# SPDX-License-Identifier: BSD-3-Clause
6#
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]7
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]8PLAT_INCLUDES := \
9 -Iplat/intel/soc/agilex/include/ \
Hadi Asyrafi309ac012019-08-01 14:48:39 +0800[diff] [blame]10 -Iplat/intel/soc/common/drivers/ \
11 -Iplat/intel/soc/common/include/
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]12
Abdul Halim, Muhammad Hadi Asyrafi0ae8d9a2020-08-19 14:50:01 +0800[diff] [blame]13# Include GICv2 driver files
14include drivers/arm/gic/v2/gicv2.mk
15AGX_GICv2_SOURCES := \
16 ${GICV2_SOURCES} \
17 plat/common/plat_gicv2.c
18
19
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]20PLAT_BL_COMMON_SOURCES := \
Abdul Halim, Muhammad Hadi Asyrafi0ae8d9a2020-08-19 14:50:01 +0800[diff] [blame]21 ${AGX_GICv2_SOURCES} \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]22 drivers/delay_timer/delay_timer.c \
23 drivers/delay_timer/generic_delay_timer.c \
24 drivers/ti/uart/aarch64/16550_console.S \
25 lib/xlat_tables/aarch64/xlat_tables.c \
26 lib/xlat_tables/xlat_tables_common.c \
Hadi Asyrafi309ac012019-08-01 14:48:39 +0800[diff] [blame]27 plat/intel/soc/common/aarch64/platform_common.c \
Chee Hong Ang64740962020-05-11 00:55:01 +0800[diff] [blame]28 plat/intel/soc/common/aarch64/plat_helpers.S \
Abdul Halim, Muhammad Hadi Asyrafi2f94ca42020-08-05 22:40:46 +0800[diff] [blame]29 plat/intel/soc/common/drivers/ccu/ncore_ccu.c \
Chee Hong Ang64740962020-05-11 00:55:01 +0800[diff] [blame]30 plat/intel/soc/common/socfpga_delay_timer.c
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]31
32BL2_SOURCES += \
33 common/desc_image_load.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]34 drivers/mmc/mmc.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]35 drivers/intel/soc/stratix10/io/s10_memmap_qspi.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]36 drivers/io/io_storage.c \
37 drivers/io/io_block.c \
38 drivers/io/io_fip.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]39 drivers/partition/partition.c \
40 drivers/partition/gpt.c \
41 drivers/synopsys/emmc/dw_mmc.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]42 lib/cpus/aarch64/cortex_a53.S \
43 plat/intel/soc/agilex/bl2_plat_setup.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]44 plat/intel/soc/agilex/soc/agilex_clock_manager.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]45 plat/intel/soc/agilex/soc/agilex_memory_controller.c \
Tien Hock Lohfcbc33d2020-05-11 01:11:39 -0700[diff] [blame]46 plat/intel/soc/agilex/soc/agilex_mmc.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]47 plat/intel/soc/agilex/soc/agilex_pinmux.c \
BenjaminLimJLa4a43272022-04-06 10:19:16 +0800[diff] [blame]48 plat/intel/soc/common/bl2_plat_mem_params_desc.c \
Hadi Asyrafi6a240c72019-08-01 15:21:20 +0800[diff] [blame]49 plat/intel/soc/common/socfpga_image_load.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]50 plat/intel/soc/common/socfpga_storage.c \
Tien Hock, Loh8d9e8912019-10-02 13:49:25 +0800[diff] [blame]51 plat/intel/soc/common/soc/socfpga_emac.c \
Abdul Halim, Muhammad Hadi Asyrafi1205ef02020-08-06 10:21:54 +0800[diff] [blame]52 plat/intel/soc/common/soc/socfpga_firewall.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]53 plat/intel/soc/common/soc/socfpga_handoff.c \
Hadi Asyrafi6f8a2b22019-10-23 18:34:14 +0800[diff] [blame]54 plat/intel/soc/common/soc/socfpga_mailbox.c \
Hadi Asyrafi67cb0ea2019-12-23 13:25:33 +0800[diff] [blame]55 plat/intel/soc/common/soc/socfpga_reset_manager.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]56 plat/intel/soc/common/drivers/qspi/cadence_qspi.c \
Abdul Halim, Muhammad Hadi Asyrafi2f94ca42020-08-05 22:40:46 +0800[diff] [blame]57 plat/intel/soc/common/drivers/wdt/watchdog.c
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]58
Rohit Nerdc2daae2022-05-11 03:15:40 -0700[diff] [blame]59include lib/zlib/zlib.mk
60PLAT_INCLUDES += -Ilib/zlib
61BL2_SOURCES += $(ZLIB_SOURCES)
62
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]63BL31_SOURCES += \
64 drivers/arm/cci/cci.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]65 lib/cpus/aarch64/aem_generic.S \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]66 lib/cpus/aarch64/cortex_a53.S \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]67 plat/common/plat_psci_common.c \
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]68 plat/intel/soc/agilex/bl31_plat_setup.c \
BenjaminLimJLa4a43272022-04-06 10:19:16 +0800[diff] [blame]69 plat/intel/soc/agilex/soc/agilex_clock_manager.c \
Hadi Asyrafi4d9f3952019-10-23 17:35:32 +0800[diff] [blame]70 plat/intel/soc/common/socfpga_psci.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]71 plat/intel/soc/common/socfpga_sip_svc.c \
Sieu Mun Tang044ed482022-05-11 10:45:19 +0800[diff] [blame]72 plat/intel/soc/common/socfpga_sip_svc_v2.c \
Hadi Asyrafi6a240c72019-08-01 15:21:20 +0800[diff] [blame]73 plat/intel/soc/common/socfpga_topology.c \
Sieu Mun Tangdbcc2cf2022-03-07 12:13:04 +0800[diff] [blame]74 plat/intel/soc/common/sip/socfpga_sip_ecc.c \
Sieu Mun Tang9f22cbf2022-03-02 11:04:09 +0800[diff] [blame]75 plat/intel/soc/common/sip/socfpga_sip_fcs.c \
Hadi Asyrafi5ae876f2019-10-23 17:58:06 +0800[diff] [blame]76 plat/intel/soc/common/soc/socfpga_mailbox.c \
Hadi Asyrafi36a9f302019-12-24 10:42:52 +0800[diff] [blame]77 plat/intel/soc/common/soc/socfpga_reset_manager.c
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]78
79PROGRAMMABLE_RESET_ADDRESS := 0
80BL2_AT_EL3 := 1
Hadi Asyrafi461f8f42019-08-20 15:33:27 +0800[diff] [blame]81BL2_INV_DCACHE := 0
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]82MULTI_CONSOLE_API := 1
Abdul Halim, Muhammad Hadi Asyrafif3a5d022020-06-29 12:15:27 +0800[diff] [blame]83SIMICS_BUILD := 0
Hadi Asyrafi616da772019-06-27 11:34:03 +0800[diff] [blame]84USE_COHERENT_MEM := 1