Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 1 | /* |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 2 | * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 5 | */ |
| 6 | #ifndef __CPU_MACROS_S__ |
| 7 | #define __CPU_MACROS_S__ |
| 8 | |
| 9 | #include <arch.h> |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 10 | #include <errata_report.h> |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 11 | |
Roberto Vargas | e0e9946 | 2017-10-30 14:43:43 +0000 | [diff] [blame] | 12 | #if defined(IMAGE_BL1) || defined(IMAGE_BL32) || (defined(IMAGE_BL2) && BL2_AT_EL3) |
| 13 | #define IMAGE_AT_EL3 |
| 14 | #endif |
| 15 | |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 16 | #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \ |
| 17 | (MIDR_PN_MASK << MIDR_PN_SHIFT) |
| 18 | |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 19 | /* The number of CPU operations allowed */ |
| 20 | #define CPU_MAX_PWR_DWN_OPS 2 |
| 21 | |
| 22 | /* Special constant to specify that CPU has no reset function */ |
| 23 | #define CPU_NO_RESET_FUNC 0 |
| 24 | |
| 25 | /* Word size for 32-bit CPUs */ |
| 26 | #define CPU_WORD_SIZE 4 |
| 27 | |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 28 | /* |
| 29 | * Whether errata status needs reporting. Errata status is printed in debug |
| 30 | * builds for both BL1 and BL32 images. |
| 31 | */ |
| 32 | #if (defined(IMAGE_BL1) || defined(IMAGE_BL32)) && DEBUG |
| 33 | # define REPORT_ERRATA 1 |
| 34 | #else |
| 35 | # define REPORT_ERRATA 0 |
| 36 | #endif |
| 37 | |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 38 | /* |
| 39 | * Define the offsets to the fields in cpu_ops structure. |
| 40 | */ |
| 41 | .struct 0 |
| 42 | CPU_MIDR: /* cpu_ops midr */ |
| 43 | .space 4 |
| 44 | /* Reset fn is needed during reset */ |
Roberto Vargas | e0e9946 | 2017-10-30 14:43:43 +0000 | [diff] [blame] | 45 | #if defined(IMAGE_AT_EL3) |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 46 | CPU_RESET_FUNC: /* cpu_ops reset_func */ |
| 47 | .space 4 |
Yatharth Kochar | f528faf | 2016-06-28 16:58:26 +0100 | [diff] [blame] | 48 | #endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 49 | #ifdef IMAGE_BL32 /* The power down core and cluster is needed only in BL32 */ |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 50 | CPU_PWR_DWN_OPS: /* cpu_ops power down functions */ |
| 51 | .space (4 * CPU_MAX_PWR_DWN_OPS) |
Yatharth Kochar | f528faf | 2016-06-28 16:58:26 +0100 | [diff] [blame] | 52 | #endif |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 53 | |
| 54 | /* |
| 55 | * Fields required to print errata status. Only in BL32 that the printing |
| 56 | * require mutual exclusion and printed flag. |
| 57 | */ |
| 58 | #if REPORT_ERRATA |
| 59 | CPU_ERRATA_FUNC: /* CPU errata status printing function */ |
| 60 | .space 4 |
Roberto Vargas | e0e9946 | 2017-10-30 14:43:43 +0000 | [diff] [blame] | 61 | #if defined(IMAGE_BL32) |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 62 | CPU_ERRATA_LOCK: |
| 63 | .space 4 |
| 64 | CPU_ERRATA_PRINTED: |
| 65 | .space 4 |
| 66 | #endif |
| 67 | #endif |
| 68 | |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 69 | CPU_OPS_SIZE = . |
| 70 | |
| 71 | /* |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 72 | * Write given expressions as words |
| 73 | * |
| 74 | * _count: |
| 75 | * Write at least _count words. If the given number of expressions |
| 76 | * is less than _count, repeat the last expression to fill _count |
| 77 | * words in total |
| 78 | * _rest: |
| 79 | * Optional list of expressions. _this is for parameter extraction |
| 80 | * only, and has no significance to the caller |
| 81 | * |
| 82 | * Invoked as: |
| 83 | * fill_constants 2, foo, bar, blah, ... |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 84 | */ |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 85 | .macro fill_constants _count:req, _this, _rest:vararg |
| 86 | .ifgt \_count |
| 87 | /* Write the current expression */ |
| 88 | .ifb \_this |
| 89 | .error "Nothing to fill" |
| 90 | .endif |
| 91 | .word \_this |
| 92 | |
| 93 | /* Invoke recursively for remaining expressions */ |
| 94 | .ifnb \_rest |
| 95 | fill_constants \_count-1, \_rest |
| 96 | .else |
| 97 | fill_constants \_count-1, \_this |
| 98 | .endif |
| 99 | .endif |
| 100 | .endm |
| 101 | |
| 102 | /* |
| 103 | * Declare CPU operations |
| 104 | * |
| 105 | * _name: |
| 106 | * Name of the CPU for which operations are being specified |
| 107 | * _midr: |
| 108 | * Numeric value expected to read from CPU's MIDR |
| 109 | * _resetfunc: |
| 110 | * Reset function for the CPU. If there's no CPU reset function, |
| 111 | * specify CPU_NO_RESET_FUNC |
| 112 | * _power_down_ops: |
| 113 | * Comma-separated list of functions to perform power-down |
| 114 | * operatios on the CPU. At least one, and up to |
| 115 | * CPU_MAX_PWR_DWN_OPS number of functions may be specified. |
| 116 | * Starting at power level 0, these functions shall handle power |
| 117 | * down at subsequent power levels. If there aren't exactly |
| 118 | * CPU_MAX_PWR_DWN_OPS functions, the last specified one will be |
| 119 | * used to handle power down at subsequent levels |
| 120 | */ |
| 121 | .macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \ |
| 122 | _power_down_ops:vararg |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 123 | .section cpu_ops, "a" |
| 124 | .align 2 |
| 125 | .type cpu_ops_\_name, %object |
| 126 | .word \_midr |
Roberto Vargas | e0e9946 | 2017-10-30 14:43:43 +0000 | [diff] [blame] | 127 | #if defined(IMAGE_AT_EL3) |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 128 | .word \_resetfunc |
Yatharth Kochar | f528faf | 2016-06-28 16:58:26 +0100 | [diff] [blame] | 129 | #endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 130 | #ifdef IMAGE_BL32 |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 131 | 1: |
| 132 | /* Insert list of functions */ |
| 133 | fill_constants CPU_MAX_PWR_DWN_OPS, \_power_down_ops |
| 134 | 2: |
| 135 | /* |
| 136 | * Error if no or more than CPU_MAX_PWR_DWN_OPS were specified in the |
| 137 | * list |
| 138 | */ |
| 139 | .ifeq 2b - 1b |
| 140 | .error "At least one power down function must be specified" |
| 141 | .else |
| 142 | .iflt 2b - 1b - (CPU_MAX_PWR_DWN_OPS * CPU_WORD_SIZE) |
| 143 | .error "More than CPU_MAX_PWR_DWN_OPS functions specified" |
| 144 | .endif |
| 145 | .endif |
Yatharth Kochar | f528faf | 2016-06-28 16:58:26 +0100 | [diff] [blame] | 146 | #endif |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 147 | |
| 148 | #if REPORT_ERRATA |
| 149 | .ifndef \_name\()_cpu_str |
| 150 | /* |
| 151 | * Place errata reported flag, and the spinlock to arbitrate access to |
| 152 | * it in the data section. |
| 153 | */ |
| 154 | .pushsection .data |
| 155 | define_asm_spinlock \_name\()_errata_lock |
| 156 | \_name\()_errata_reported: |
| 157 | .word 0 |
| 158 | .popsection |
| 159 | |
| 160 | /* Place CPU string in rodata */ |
| 161 | .pushsection .rodata |
| 162 | \_name\()_cpu_str: |
| 163 | .asciz "\_name" |
| 164 | .popsection |
| 165 | .endif |
| 166 | |
| 167 | /* |
| 168 | * Weakly-bound, optional errata status printing function for CPUs of |
| 169 | * this class. |
| 170 | */ |
| 171 | .weak \_name\()_errata_report |
| 172 | .word \_name\()_errata_report |
| 173 | |
| 174 | #ifdef IMAGE_BL32 |
| 175 | /* Pointers to errata lock and reported flag */ |
| 176 | .word \_name\()_errata_lock |
| 177 | .word \_name\()_errata_reported |
| 178 | #endif |
| 179 | #endif |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 180 | .endm |
| 181 | |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 182 | #if REPORT_ERRATA |
| 183 | /* |
| 184 | * Print status of a CPU errata |
| 185 | * |
| 186 | * _chosen: |
| 187 | * Identifier indicating whether or not a CPU errata has been |
| 188 | * compiled in. |
| 189 | * _cpu: |
| 190 | * Name of the CPU |
| 191 | * _id: |
| 192 | * Errata identifier |
| 193 | * _rev_var: |
| 194 | * Register containing the combined value CPU revision and variant |
| 195 | * - typically the return value of cpu_get_rev_var |
| 196 | */ |
| 197 | .macro report_errata _chosen, _cpu, _id, _rev_var=r4 |
| 198 | /* Stash a string with errata ID */ |
| 199 | .pushsection .rodata |
| 200 | \_cpu\()_errata_\_id\()_str: |
| 201 | .asciz "\_id" |
| 202 | .popsection |
| 203 | |
| 204 | /* Check whether errata applies */ |
| 205 | mov r0, \_rev_var |
| 206 | bl check_errata_\_id |
| 207 | |
| 208 | .ifeq \_chosen |
| 209 | /* |
| 210 | * Errata workaround has not been compiled in. If the errata would have |
| 211 | * applied had it been compiled in, print its status as missing. |
| 212 | */ |
| 213 | cmp r0, #0 |
| 214 | movne r0, #ERRATA_MISSING |
| 215 | .endif |
| 216 | ldr r1, =\_cpu\()_cpu_str |
| 217 | ldr r2, =\_cpu\()_errata_\_id\()_str |
| 218 | bl errata_print_msg |
| 219 | .endm |
| 220 | #endif |
| 221 | |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 222 | #endif /* __CPU_MACROS_S__ */ |