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Soby Mathew748be1d2016-05-05 14:10:46 +01001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#ifndef __CPU_MACROS_S__
31#define __CPU_MACROS_S__
32
33#include <arch.h>
34
35#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
36 (MIDR_PN_MASK << MIDR_PN_SHIFT)
37
38 /*
39 * Define the offsets to the fields in cpu_ops structure.
40 */
41 .struct 0
42CPU_MIDR: /* cpu_ops midr */
43 .space 4
44/* Reset fn is needed during reset */
Yatharth Kocharf528faf2016-06-28 16:58:26 +010045#if IMAGE_BL1 || IMAGE_BL32
Soby Mathew748be1d2016-05-05 14:10:46 +010046CPU_RESET_FUNC: /* cpu_ops reset_func */
47 .space 4
Yatharth Kocharf528faf2016-06-28 16:58:26 +010048#endif
49#if IMAGE_BL32 /* The power down core and cluster is needed only in BL32 */
Soby Mathew748be1d2016-05-05 14:10:46 +010050CPU_PWR_DWN_CORE: /* cpu_ops core_pwr_dwn */
51 .space 4
52CPU_PWR_DWN_CLUSTER: /* cpu_ops cluster_pwr_dwn */
53 .space 4
Yatharth Kocharf528faf2016-06-28 16:58:26 +010054#endif
Soby Mathew748be1d2016-05-05 14:10:46 +010055CPU_OPS_SIZE = .
56
57 /*
58 * Convenience macro to declare cpu_ops structure.
59 * Make sure the structure fields are as per the offsets
60 * defined above.
61 */
62 .macro declare_cpu_ops _name:req, _midr:req, _noresetfunc = 0
63 .section cpu_ops, "a"
64 .align 2
65 .type cpu_ops_\_name, %object
66 .word \_midr
Yatharth Kocharf528faf2016-06-28 16:58:26 +010067#if IMAGE_BL1 || IMAGE_BL32
Soby Mathew748be1d2016-05-05 14:10:46 +010068 .if \_noresetfunc
69 .word 0
70 .else
71 .word \_name\()_reset_func
72 .endif
Yatharth Kocharf528faf2016-06-28 16:58:26 +010073#endif
74#if IMAGE_BL32
Soby Mathew748be1d2016-05-05 14:10:46 +010075 .word \_name\()_core_pwr_dwn
76 .word \_name\()_cluster_pwr_dwn
Yatharth Kocharf528faf2016-06-28 16:58:26 +010077#endif
Soby Mathew748be1d2016-05-05 14:10:46 +010078 .endm
79
80#endif /* __CPU_MACROS_S__ */