developer | 86ada3c | 2020-07-03 09:19:06 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2020, MediaTek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef MT_TIMER_H |
| 8 | #define MT_TIMER_H |
| 9 | |
| 10 | #define SYSTIMER_BASE (0x10017000) |
| 11 | #define CNTCR_REG (SYSTIMER_BASE + 0x0) |
| 12 | #define CNTSR_REG (SYSTIMER_BASE + 0x4) |
| 13 | #define CNTSYS_L_REG (SYSTIMER_BASE + 0x8) |
| 14 | #define CNTSYS_H_REG (SYSTIMER_BASE + 0xc) |
developer | 57d8b88 | 2020-07-06 18:01:42 +0800 | [diff] [blame] | 15 | #define CNTWACR_REG (SYSTIMER_BASE + 0x10) |
| 16 | #define CNTRACR_REG (SYSTIMER_BASE + 0x14) |
developer | 86ada3c | 2020-07-03 09:19:06 +0800 | [diff] [blame] | 17 | |
| 18 | #define TIEO_EN (1 << 3) |
| 19 | #define COMP_15_EN (1 << 10) |
| 20 | #define COMP_20_EN (1 << 11) |
| 21 | #define COMP_25_EN (1 << 12) |
| 22 | |
| 23 | #define COMP_FEATURE_MASK (COMP_15_EN | COMP_20_EN | COMP_25_EN | TIEO_EN) |
| 24 | #define COMP_15_MASK (COMP_15_EN) |
| 25 | #define COMP_20_MASK (COMP_20_EN | TIEO_EN) |
| 26 | #define COMP_25_MASK (COMP_20_EN | COMP_25_EN) |
| 27 | |
developer | 57d8b88 | 2020-07-06 18:01:42 +0800 | [diff] [blame] | 28 | #define CNT_WRITE_ACCESS_CTL_MASK (0x3FFFFF0U) |
| 29 | #define CNT_READ_ACCESS_CTL_MASK (0x3FFFFFFU) |
developer | 86ada3c | 2020-07-03 09:19:06 +0800 | [diff] [blame] | 30 | |
| 31 | void sched_clock_init(uint64_t normal_base, uint64_t atf_base); |
| 32 | uint64_t sched_clock(void); |
developer | 57d8b88 | 2020-07-06 18:01:42 +0800 | [diff] [blame] | 33 | void mt_systimer_init(void); |
developer | 86ada3c | 2020-07-03 09:19:06 +0800 | [diff] [blame] | 34 | |
| 35 | #endif /* MT_TIMER_H */ |