blob: 7aca4a3bf9d1415c736c24ac8c7fe441786fd73f [file] [log] [blame]
developer86ada3c2020-07-03 09:19:06 +08001/*
2 * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef MT_TIMER_H
8#define MT_TIMER_H
9
10#define SYSTIMER_BASE (0x10017000)
11#define CNTCR_REG (SYSTIMER_BASE + 0x0)
12#define CNTSR_REG (SYSTIMER_BASE + 0x4)
13#define CNTSYS_L_REG (SYSTIMER_BASE + 0x8)
14#define CNTSYS_H_REG (SYSTIMER_BASE + 0xc)
15
16#define TIEO_EN (1 << 3)
17#define COMP_15_EN (1 << 10)
18#define COMP_20_EN (1 << 11)
19#define COMP_25_EN (1 << 12)
20
21#define COMP_FEATURE_MASK (COMP_15_EN | COMP_20_EN | COMP_25_EN | TIEO_EN)
22#define COMP_15_MASK (COMP_15_EN)
23#define COMP_20_MASK (COMP_20_EN | TIEO_EN)
24#define COMP_25_MASK (COMP_20_EN | COMP_25_EN)
25
26
27void sched_clock_init(uint64_t normal_base, uint64_t atf_base);
28uint64_t sched_clock(void);
29
30#endif /* MT_TIMER_H */