Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 31 | #ifndef __TSPD_PRIVATE_H__ |
| 32 | #define __TSPD_PRIVATE_H__ |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 33 | |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 34 | #include <arch.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 35 | #include <context.h> |
Achin Gupta | aeaab68 | 2014-05-09 13:21:31 +0100 | [diff] [blame] | 36 | #include <interrupt_mgmt.h> |
Dan Handley | ed6ff95 | 2014-05-14 17:44:19 +0100 | [diff] [blame] | 37 | #include <platform_def.h> |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 38 | #include <psci.h> |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 39 | |
| 40 | /******************************************************************************* |
| 41 | * Secure Payload PM state information e.g. SP is suspended, uninitialised etc |
Achin Gupta | 18d6eaf | 2014-05-04 18:23:26 +0100 | [diff] [blame] | 42 | * and macros to access the state information in the per-cpu 'state' flags |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 43 | ******************************************************************************/ |
Achin Gupta | 18d6eaf | 2014-05-04 18:23:26 +0100 | [diff] [blame] | 44 | #define TSP_PSTATE_OFF 0 |
| 45 | #define TSP_PSTATE_ON 1 |
| 46 | #define TSP_PSTATE_SUSPEND 2 |
| 47 | #define TSP_PSTATE_SHIFT 0 |
| 48 | #define TSP_PSTATE_MASK 0x3 |
| 49 | #define get_tsp_pstate(state) ((state >> TSP_PSTATE_SHIFT) & TSP_PSTATE_MASK) |
| 50 | #define clr_tsp_pstate(state) (state &= ~(TSP_PSTATE_MASK \ |
| 51 | << TSP_PSTATE_SHIFT)) |
| 52 | #define set_tsp_pstate(st, pst) do { \ |
| 53 | clr_tsp_pstate(st); \ |
| 54 | st |= (pst & TSP_PSTATE_MASK) << \ |
| 55 | TSP_PSTATE_SHIFT; \ |
| 56 | } while (0); |
| 57 | |
| 58 | |
| 59 | /* |
| 60 | * This flag is used by the TSPD to determine if the TSP is servicing a standard |
| 61 | * SMC request prior to programming the next entry into the TSP e.g. if TSP |
| 62 | * execution is preempted by a non-secure interrupt and handed control to the |
| 63 | * normal world. If another request which is distinct from what the TSP was |
| 64 | * previously doing arrives, then this flag will be help the TSPD to either |
| 65 | * reject the new request or service it while ensuring that the previous context |
| 66 | * is not corrupted. |
| 67 | */ |
| 68 | #define STD_SMC_ACTIVE_FLAG_SHIFT 2 |
| 69 | #define STD_SMC_ACTIVE_FLAG_MASK 1 |
| 70 | #define get_std_smc_active_flag(state) ((state >> STD_SMC_ACTIVE_FLAG_SHIFT) \ |
| 71 | & STD_SMC_ACTIVE_FLAG_MASK) |
| 72 | #define set_std_smc_active_flag(state) (state |= \ |
| 73 | 1 << STD_SMC_ACTIVE_FLAG_SHIFT) |
| 74 | #define clr_std_smc_active_flag(state) (state &= \ |
| 75 | ~(STD_SMC_ACTIVE_FLAG_MASK \ |
| 76 | << STD_SMC_ACTIVE_FLAG_SHIFT)) |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 77 | |
| 78 | /******************************************************************************* |
| 79 | * Secure Payload execution state information i.e. aarch32 or aarch64 |
| 80 | ******************************************************************************/ |
| 81 | #define TSP_AARCH32 MODE_RW_32 |
| 82 | #define TSP_AARCH64 MODE_RW_64 |
| 83 | |
| 84 | /******************************************************************************* |
| 85 | * The SPD should know the type of Secure Payload. |
| 86 | ******************************************************************************/ |
| 87 | #define TSP_TYPE_UP PSCI_TOS_NOT_UP_MIG_CAP |
| 88 | #define TSP_TYPE_UPM PSCI_TOS_UP_MIG_CAP |
| 89 | #define TSP_TYPE_MP PSCI_TOS_NOT_PRESENT_MP |
| 90 | |
| 91 | /******************************************************************************* |
| 92 | * Secure Payload migrate type information as known to the SPD. We assume that |
| 93 | * the SPD is dealing with an MP Secure Payload. |
| 94 | ******************************************************************************/ |
| 95 | #define TSP_MIGRATE_INFO TSP_TYPE_MP |
| 96 | |
| 97 | /******************************************************************************* |
| 98 | * Number of cpus that the present on this platform. TODO: Rely on a topology |
| 99 | * tree to determine this in the future to avoid assumptions about mpidr |
| 100 | * allocation |
| 101 | ******************************************************************************/ |
| 102 | #define TSPD_CORE_COUNT PLATFORM_CORE_COUNT |
| 103 | |
| 104 | /******************************************************************************* |
| 105 | * Constants that allow assembler code to preserve callee-saved registers of the |
| 106 | * C runtime context while performing a security state switch. |
| 107 | ******************************************************************************/ |
| 108 | #define TSPD_C_RT_CTX_X19 0x0 |
| 109 | #define TSPD_C_RT_CTX_X20 0x8 |
| 110 | #define TSPD_C_RT_CTX_X21 0x10 |
| 111 | #define TSPD_C_RT_CTX_X22 0x18 |
| 112 | #define TSPD_C_RT_CTX_X23 0x20 |
| 113 | #define TSPD_C_RT_CTX_X24 0x28 |
| 114 | #define TSPD_C_RT_CTX_X25 0x30 |
| 115 | #define TSPD_C_RT_CTX_X26 0x38 |
| 116 | #define TSPD_C_RT_CTX_X27 0x40 |
| 117 | #define TSPD_C_RT_CTX_X28 0x48 |
| 118 | #define TSPD_C_RT_CTX_X29 0x50 |
| 119 | #define TSPD_C_RT_CTX_X30 0x58 |
| 120 | #define TSPD_C_RT_CTX_SIZE 0x60 |
| 121 | #define TSPD_C_RT_CTX_ENTRIES (TSPD_C_RT_CTX_SIZE >> DWORD_SHIFT) |
| 122 | |
| 123 | #ifndef __ASSEMBLY__ |
| 124 | |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 125 | #include <cassert.h> |
| 126 | #include <stdint.h> |
| 127 | |
Soby Mathew | 9f71f70 | 2014-05-09 20:49:17 +0100 | [diff] [blame] | 128 | /* |
| 129 | * The number of arguments to save during a SMC call for TSP. |
| 130 | * Currently only x1 and x2 are used by TSP. |
| 131 | */ |
| 132 | #define TSP_NUM_ARGS 0x2 |
| 133 | |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 134 | /* AArch64 callee saved general purpose register context structure. */ |
| 135 | DEFINE_REG_STRUCT(c_rt_regs, TSPD_C_RT_CTX_ENTRIES); |
| 136 | |
| 137 | /* |
| 138 | * Compile time assertion to ensure that both the compiler and linker |
| 139 | * have the same double word aligned view of the size of the C runtime |
| 140 | * register context. |
| 141 | */ |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 142 | CASSERT(TSPD_C_RT_CTX_SIZE == sizeof(c_rt_regs_t), \ |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 143 | assert_spd_c_rt_regs_size_mismatch); |
| 144 | |
| 145 | /******************************************************************************* |
| 146 | * Structure which helps the SPD to maintain the per-cpu state of the SP. |
Achin Gupta | aeaab68 | 2014-05-09 13:21:31 +0100 | [diff] [blame] | 147 | * 'saved_spsr_el3' - temporary copy to allow FIQ handling when the TSP has been |
| 148 | * preempted. |
| 149 | * 'saved_elr_el3' - temporary copy to allow FIQ handling when the TSP has been |
| 150 | * preempted. |
| 151 | * 'state' - collection of flags to track SP state e.g. on/off |
| 152 | * 'mpidr' - mpidr to associate a context with a cpu |
| 153 | * 'c_rt_ctx' - stack address to restore C runtime context from after |
| 154 | * returning from a synchronous entry into the SP. |
| 155 | * 'cpu_ctx' - space to maintain SP architectural state |
Soby Mathew | 9f71f70 | 2014-05-09 20:49:17 +0100 | [diff] [blame] | 156 | * 'saved_tsp_args' - space to store arguments for TSP arithmetic operations |
| 157 | * which will queried using the TSP_GET_ARGS SMC by TSP. |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 158 | ******************************************************************************/ |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 159 | typedef struct tsp_context { |
Achin Gupta | aeaab68 | 2014-05-09 13:21:31 +0100 | [diff] [blame] | 160 | uint64_t saved_elr_el3; |
| 161 | uint32_t saved_spsr_el3; |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 162 | uint32_t state; |
| 163 | uint64_t mpidr; |
| 164 | uint64_t c_rt_ctx; |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 165 | cpu_context_t cpu_ctx; |
Soby Mathew | 9f71f70 | 2014-05-09 20:49:17 +0100 | [diff] [blame] | 166 | uint64_t saved_tsp_args[TSP_NUM_ARGS]; |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 167 | } tsp_context_t; |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 168 | |
Soby Mathew | 9f71f70 | 2014-05-09 20:49:17 +0100 | [diff] [blame] | 169 | /* Helper macros to store and retrieve tsp args from tsp_context */ |
| 170 | #define store_tsp_args(tsp_ctx, x1, x2) do {\ |
| 171 | tsp_ctx->saved_tsp_args[0] = x1;\ |
| 172 | tsp_ctx->saved_tsp_args[1] = x2;\ |
| 173 | } while (0) |
| 174 | |
| 175 | #define get_tsp_args(tsp_ctx, x1, x2) do {\ |
| 176 | x1 = tsp_ctx->saved_tsp_args[0];\ |
| 177 | x2 = tsp_ctx->saved_tsp_args[1];\ |
| 178 | } while (0) |
| 179 | |
Jeenu Viswambharan | 7f36660 | 2014-02-20 17:11:00 +0000 | [diff] [blame] | 180 | /* TSPD power management handlers */ |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 181 | extern const spd_pm_ops_t tspd_pm; |
Jeenu Viswambharan | 7f36660 | 2014-02-20 17:11:00 +0000 | [diff] [blame] | 182 | |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 183 | /******************************************************************************* |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 184 | * Forward declarations |
| 185 | ******************************************************************************/ |
Andrew Thoelke | 891c4ca | 2014-05-20 21:43:27 +0100 | [diff] [blame] | 186 | struct tsp_vectors; |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 187 | |
| 188 | /******************************************************************************* |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 189 | * Function & Data prototypes |
| 190 | ******************************************************************************/ |
Dan Handley | a17fefa | 2014-05-14 12:38:32 +0100 | [diff] [blame] | 191 | uint64_t tspd_enter_sp(uint64_t *c_rt_ctx); |
| 192 | void __dead2 tspd_exit_sp(uint64_t c_rt_ctx, uint64_t ret); |
| 193 | uint64_t tspd_synchronous_sp_entry(tsp_context_t *tsp_ctx); |
| 194 | void __dead2 tspd_synchronous_sp_exit(tsp_context_t *tsp_ctx, uint64_t ret); |
| 195 | int32_t tspd_init_secure_context(uint64_t entrypoint, |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 196 | uint32_t rw, |
| 197 | uint64_t mpidr, |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 198 | tsp_context_t *tsp_ctx); |
| 199 | extern tsp_context_t tspd_sp_context[TSPD_CORE_COUNT]; |
Andrew Thoelke | 891c4ca | 2014-05-20 21:43:27 +0100 | [diff] [blame] | 200 | extern struct tsp_vectors *tsp_vectors; |
Achin Gupta | 375f538 | 2014-02-18 18:12:48 +0000 | [diff] [blame] | 201 | #endif /*__ASSEMBLY__*/ |
| 202 | |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 203 | #endif /* __TSPD_PRIVATE_H__ */ |