Paul Beesley | f3653a6 | 2019-05-22 11:22:44 +0100 | [diff] [blame] | 1 | STMicroelectronics STM32MP1 |
| 2 | =========================== |
Yann Gautier | 7511539 | 2018-07-16 14:49:34 +0200 | [diff] [blame] | 3 | |
| 4 | STM32MP1 is a microprocessor designed by STMicroelectronics |
| 5 | based on a dual Arm Cortex-A7. |
| 6 | It is an Armv7-A platform, using dedicated code from TF-A. |
Yann Gautier | 969be34 | 2019-02-20 17:34:16 +0100 | [diff] [blame] | 7 | The STM32MP1 chip also embeds a Cortex-M4. |
| 8 | More information can be found on `STM32MP1 Series`_ page. |
Yann Gautier | 7511539 | 2018-07-16 14:49:34 +0200 | [diff] [blame] | 9 | |
| 10 | |
Yann Gautier | 26c1067 | 2020-10-13 11:27:05 +0200 | [diff] [blame] | 11 | STM32MP1 Versions |
| 12 | ----------------- |
| 13 | The STM32MP1 series is available in 3 different lines which are pin-to-pin compatible: |
| 14 | |
| 15 | - STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and CAN FD |
| 16 | - STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz and CAN FD |
| 17 | - STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz |
| 18 | |
| 19 | Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: |
| 20 | |
| 21 | - A Basic + Cortex-A7 @ 650 MHz |
| 22 | - C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz |
| 23 | - D Basic + Cortex-A7 @ 800 MHz |
| 24 | - F Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz |
| 25 | |
| 26 | The `STM32MP1 part number codification`_ page gives more information about part numbers. |
| 27 | |
Yann Gautier | 7511539 | 2018-07-16 14:49:34 +0200 | [diff] [blame] | 28 | Design |
| 29 | ------ |
| 30 | The STM32MP1 resets in the ROM code of the Cortex-A7. |
| 31 | The primary boot core (core 0) executes the boot sequence while |
| 32 | secondary boot core (core 1) is kept in a holding pen loop. |
| 33 | The ROM code boot sequence loads the TF-A binary image from boot device |
| 34 | to embedded SRAM. |
| 35 | |
| 36 | The TF-A image must be properly formatted with a STM32 header structure |
| 37 | for ROM code is able to load this image. |
| 38 | Tool stm32image can be used to prepend this header to the generated TF-A binary. |
| 39 | |
| 40 | At compilation step, BL2, BL32 and DTB file are linked together in a single |
| 41 | binary. The stm32image tool is also generated and the header is added to TF-A |
| 42 | binary. This binary file with header is named tf-a-stm32mp157c-ev1.stm32. |
| 43 | It can then be copied in the first partition of the boot device. |
| 44 | |
| 45 | |
| 46 | Memory mapping |
| 47 | ~~~~~~~~~~~~~~ |
| 48 | |
| 49 | :: |
| 50 | |
| 51 | 0x00000000 +-----------------+ |
| 52 | | | ROM |
| 53 | 0x00020000 +-----------------+ |
| 54 | | | |
| 55 | | ... | |
| 56 | | | |
| 57 | 0x2FFC0000 +-----------------+ \ |
| 58 | | | | |
| 59 | | ... | | |
| 60 | | | | |
| 61 | 0x2FFD8000 +-----------------+ | |
| 62 | | TF-A DTB | | Embedded SRAM |
| 63 | 0x2FFDC000 +-----------------+ | |
| 64 | | BL2 | | |
| 65 | 0x2FFEF000 +-----------------+ | |
| 66 | | BL32 | | |
| 67 | 0x30000000 +-----------------+ / |
| 68 | | | |
| 69 | | ... | |
| 70 | | | |
| 71 | 0x40000000 +-----------------+ |
| 72 | | | |
| 73 | | | Devices |
| 74 | | | |
| 75 | 0xC0000000 +-----------------+ \ |
| 76 | | | | |
| 77 | 0xC0100000 +-----------------+ | |
| 78 | | BL33 | | Non-secure RAM (DDR) |
| 79 | | ... | | |
| 80 | | | | |
| 81 | 0xFFFFFFFF +-----------------+ / |
| 82 | |
| 83 | |
| 84 | Boot sequence |
| 85 | ~~~~~~~~~~~~~ |
| 86 | |
| 87 | ROM code -> BL2 (compiled with BL2_AT_EL3) -> BL32 (SP_min) -> BL33 (U-Boot) |
| 88 | |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 89 | or if Op-TEE is used: |
| 90 | |
| 91 | ROM code -> BL2 (compiled with BL2_AT_EL3) -> OP-TEE -> BL33 (U-Boot) |
| 92 | |
Yann Gautier | 7511539 | 2018-07-16 14:49:34 +0200 | [diff] [blame] | 93 | |
| 94 | Build Instructions |
| 95 | ------------------ |
Lionel Debieve | 4066c90 | 2019-10-17 15:12:13 +0200 | [diff] [blame] | 96 | Boot media(s) supported by BL2 must be specified in the build command. |
| 97 | Available storage medias are: |
Yann Gautier | 2392913 | 2021-02-15 17:13:23 +0100 | [diff] [blame] | 98 | |
Lionel Debieve | 4066c90 | 2019-10-17 15:12:13 +0200 | [diff] [blame] | 99 | - ``STM32MP_SDMMC`` |
| 100 | - ``STM32MP_EMMC`` |
| 101 | - ``STM32MP_RAW_NAND`` |
| 102 | - ``STM32MP_SPI_NAND`` |
| 103 | - ``STM32MP_SPI_NOR`` |
Yann Gautier | 7511539 | 2018-07-16 14:49:34 +0200 | [diff] [blame] | 104 | |
Lionel Debieve | 4066c90 | 2019-10-17 15:12:13 +0200 | [diff] [blame] | 105 | To build with SP_min and support for all bootable devices: |
Yann Gautier | 7511539 | 2018-07-16 14:49:34 +0200 | [diff] [blame] | 106 | |
| 107 | .. code:: bash |
| 108 | |
Lionel Debieve | 4066c90 | 2019-10-17 15:12:13 +0200 | [diff] [blame] | 109 | make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 AARCH32_SP=sp_min STM32MP_SDMMC=1 STM32MP_EMMC=1 STM32MP_RAW_NAND=1 STM32MP_SPI_NAND=1 |
| 110 | STM32MP_SPI_NOR=1 DTB_FILE_NAME=stm32mp157c-ev1.dtb |
Yann Gautier | b4ddd30 | 2018-10-24 10:50:12 +0200 | [diff] [blame] | 111 | cd <u-boot_directory> |
Yann Gautier | b7168ee | 2019-05-20 11:50:18 +0200 | [diff] [blame] | 112 | make stm32mp15_trusted_defconfig |
Yann Gautier | 969be34 | 2019-02-20 17:34:16 +0100 | [diff] [blame] | 113 | make DEVICE_TREE=stm32mp157c-ev1 all |
Yann Gautier | 7511539 | 2018-07-16 14:49:34 +0200 | [diff] [blame] | 114 | |
Lionel Debieve | 4066c90 | 2019-10-17 15:12:13 +0200 | [diff] [blame] | 115 | To build TF-A with OP-TEE support for all bootable devices: |
Yann Gautier | 2392913 | 2021-02-15 17:13:23 +0100 | [diff] [blame] | 116 | |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 117 | .. code:: bash |
| 118 | |
Lionel Debieve | 4066c90 | 2019-10-17 15:12:13 +0200 | [diff] [blame] | 119 | make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 AARCH32_SP=optee STM32MP_SDMMC=1 STM32MP_EMMC=1 STM32MP_RAW_NAND=1 STM32MP_SPI_NAND=1 STM32MP_SPI_NOR=1 DTB_FILE_NAME=stm32mp157c-ev1.dtb |
| 120 | cd <optee_directory> |
| 121 | make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm PLATFORM=stm32mp1 CFG_EMBED_DTB_SOURCE_FILE=stm32mp157c-ev1.dts |
| 122 | cd <u-boot_directory> |
Jan Kiszka | 30576a4 | 2020-10-02 10:07:00 +0200 | [diff] [blame] | 123 | make stm32mp15_trusted_defconfig |
Lionel Debieve | 4066c90 | 2019-10-17 15:12:13 +0200 | [diff] [blame] | 124 | make DEVICE_TREE=stm32mp157c-ev1 all |
| 125 | |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 126 | |
Yann Gautier | 7511539 | 2018-07-16 14:49:34 +0200 | [diff] [blame] | 127 | The following build options are supported: |
| 128 | |
| 129 | - ``ENABLE_STACK_PROTECTOR``: To enable the stack protection. |
Yann Gautier | b4ddd30 | 2018-10-24 10:50:12 +0200 | [diff] [blame] | 130 | |
| 131 | |
| 132 | Populate SD-card |
| 133 | ---------------- |
| 134 | |
| 135 | The SD-card has to be formated with GPT. |
| 136 | It should contain at least those partitions: |
| 137 | |
| 138 | - fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary |
| 139 | - ssbl: to copy the u-boot.stm32 binary |
| 140 | |
| 141 | Usually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl. |
Yann Gautier | 969be34 | 2019-02-20 17:34:16 +0100 | [diff] [blame] | 142 | |
Jan Kiszka | 30576a4 | 2020-10-02 10:07:00 +0200 | [diff] [blame] | 143 | OP-TEE artifacts go into separate partitions as follows: |
| 144 | |
| 145 | - teeh: tee-header_v2.stm32 |
| 146 | - teed: tee-pageable_v2.stm32 |
| 147 | - teex: tee-pager_v2.stm32 |
| 148 | |
Yann Gautier | 969be34 | 2019-02-20 17:34:16 +0100 | [diff] [blame] | 149 | |
| 150 | .. _STM32MP1 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html |
Yann Gautier | 26c1067 | 2020-10-13 11:27:05 +0200 | [diff] [blame] | 151 | .. _STM32MP1 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP15_microprocessor#Part_number_codification |