| Varun Wadekar | 0f3baa0 | 2015-07-16 11:36:33 +0530 | [diff] [blame] | 1 | # |
| Varun Wadekar | 9f4a7d3 | 2018-10-19 11:42:28 -0700 | [diff] [blame] | 2 | # Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
| Varun Wadekar | 29b4665 | 2018-05-17 11:10:13 -0700 | [diff] [blame] | 3 | # Copyright (c) 2020, NVIDIA Corporation. All rights reserved. |
| Varun Wadekar | 0f3baa0 | 2015-07-16 11:36:33 +0530 | [diff] [blame] | 4 | # |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 5 | # SPDX-License-Identifier: BSD-3-Clause |
| Varun Wadekar | 0f3baa0 | 2015-07-16 11:36:33 +0530 | [diff] [blame] | 6 | # |
| 7 | |
| Varun Wadekar | e98a146 | 2015-07-31 10:15:41 +0530 | [diff] [blame] | 8 | TZDRAM_BASE := 0xF5C00000 |
| Varun Wadekar | 0f3baa0 | 2015-07-16 11:36:33 +0530 | [diff] [blame] | 9 | $(eval $(call add_define,TZDRAM_BASE)) |
| 10 | |
| 11 | PLATFORM_CLUSTER_COUNT := 1 |
| 12 | $(eval $(call add_define,PLATFORM_CLUSTER_COUNT)) |
| 13 | |
| 14 | PLATFORM_MAX_CPUS_PER_CLUSTER := 2 |
| 15 | $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER)) |
| 16 | |
| Varun Wadekar | 97f2490 | 2015-09-09 11:29:24 +0530 | [diff] [blame] | 17 | MAX_XLAT_TABLES := 3 |
| 18 | $(eval $(call add_define,MAX_XLAT_TABLES)) |
| 19 | |
| 20 | MAX_MMAP_REGIONS := 8 |
| 21 | $(eval $(call add_define,MAX_MMAP_REGIONS)) |
| 22 | |
| Varun Wadekar | 26dfb51 | 2019-01-17 16:36:23 -0800 | [diff] [blame] | 23 | # platform files |
| 24 | PLAT_INCLUDES += -Iplat/nvidia/tegra/include/t132 |
| 25 | |
| Varun Wadekar | 8b1068b | 2020-02-26 14:52:01 -0800 | [diff] [blame] | 26 | BL31_SOURCES += ${TEGRA_GICv2_SOURCES} \ |
| 27 | drivers/ti/uart/aarch64/16550_console.S \ |
| Varun Wadekar | 50a3303 | 2017-11-15 15:46:38 -0800 | [diff] [blame] | 28 | lib/cpus/aarch64/denver.S \ |
| Varun Wadekar | 0c9105e | 2019-06-13 15:32:11 -0700 | [diff] [blame] | 29 | ${TEGRA_DRIVERS}/flowctrl/flowctrl.c \ |
| 30 | ${TEGRA_DRIVERS}/memctrl/memctrl_v1.c \ |
| Varun Wadekar | 8b1068b | 2020-02-26 14:52:01 -0800 | [diff] [blame] | 31 | ${TEGRA_DRIVERS}/pmc/pmc.c \ |
| Varun Wadekar | 0f3baa0 | 2015-07-16 11:36:33 +0530 | [diff] [blame] | 32 | ${SOC_DIR}/plat_psci_handlers.c \ |
| Varun Wadekar | cbdace1 | 2015-09-03 14:32:44 +0530 | [diff] [blame] | 33 | ${SOC_DIR}/plat_sip_calls.c \ |
| Varun Wadekar | 0f3baa0 | 2015-07-16 11:36:33 +0530 | [diff] [blame] | 34 | ${SOC_DIR}/plat_setup.c \ |
| 35 | ${SOC_DIR}/plat_secondary.c |