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Nishanth Menon0192f892016-10-14 01:13:34 +00001/*
2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <arch_helpers.h>
9#include <assert.h>
10#include <bl_common.h>
11#include <debug.h>
Nishanth Menonce976042016-10-14 01:13:44 +000012#include <k3_console.h>
Nishanth Menon3ed1b282016-10-14 01:13:45 +000013#include <plat_arm.h>
Nishanth Menon0192f892016-10-14 01:13:34 +000014#include <platform_def.h>
Nishanth Menonf97ad372016-10-14 01:13:49 +000015#include <k3_gicv3.h>
Nishanth Menon0192f892016-10-14 01:13:34 +000016#include <string.h>
Andrew F. Davisa513b2a2018-05-04 19:06:09 +000017#include <ti_sci.h>
Nishanth Menon0192f892016-10-14 01:13:34 +000018
Nishanth Menon3ed1b282016-10-14 01:13:45 +000019/* Table of regions to map using the MMU */
20const mmap_region_t plat_arm_mmap[] = {
21 MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
Nishanth Menonce976042016-10-14 01:13:44 +000022 MAP_REGION_FLAT(K3_USART_BASE_ADDRESS, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
Nishanth Menonf97ad372016-10-14 01:13:49 +000023 MAP_REGION_FLAT(K3_GICD_BASE, K3_GICD_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
24 MAP_REGION_FLAT(K3_GICR_BASE, K3_GICR_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
Andrew F. Davis537d3ff2018-05-04 19:06:08 +000025 MAP_REGION_FLAT(SEC_PROXY_RT_BASE, SEC_PROXY_RT_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
26 MAP_REGION_FLAT(SEC_PROXY_SCFG_BASE, SEC_PROXY_SCFG_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
27 MAP_REGION_FLAT(SEC_PROXY_DATA_BASE, SEC_PROXY_DATA_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
Nishanth Menon3ed1b282016-10-14 01:13:45 +000028 { /* sentinel */ }
29};
30
Benjamin Faire62e5772016-10-14 01:13:52 +000031/*
32 * Placeholder variables for maintaining information about the next image(s)
33 */
34static entry_point_info_t bl32_image_ep_info;
35static entry_point_info_t bl33_image_ep_info;
36
37/*******************************************************************************
38 * Gets SPSR for BL33 entry
39 ******************************************************************************/
40static uint32_t k3_get_spsr_for_bl33_entry(void)
41{
42 unsigned long el_status;
43 unsigned int mode;
44 uint32_t spsr;
45
46 /* Figure out what mode we enter the non-secure world in */
47 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
48 el_status &= ID_AA64PFR0_ELX_MASK;
49
50 mode = (el_status) ? MODE_EL2 : MODE_EL1;
51
52 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
53 return spsr;
54}
55
Nishanth Menon0192f892016-10-14 01:13:34 +000056/*******************************************************************************
57 * Perform any BL3-1 early platform setup, such as console init and deciding on
58 * memory layout.
59 ******************************************************************************/
Antonio Nino Diaz27187bc2018-09-24 17:16:45 +010060void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
61 u_register_t arg2, u_register_t arg3)
Nishanth Menon0192f892016-10-14 01:13:34 +000062{
63 /* There are no parameters from BL2 if BL31 is a reset vector */
Antonio Nino Diaz27187bc2018-09-24 17:16:45 +010064 assert(arg0 == 0U);
65 assert(arg1 == 0U);
Benjamin Faire62e5772016-10-14 01:13:52 +000066
Nishanth Menonce976042016-10-14 01:13:44 +000067 bl31_console_setup();
68
Benjamin Faire62e5772016-10-14 01:13:52 +000069#ifdef BL32_BASE
70 /* Populate entry point information for BL32 */
71 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0);
72 bl32_image_ep_info.pc = BL32_BASE;
73 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
74 DISABLE_ALL_EXCEPTIONS);
75 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
76#endif
77
78 /* Populate entry point information for BL33 */
79 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0);
80 bl33_image_ep_info.pc = PRELOADED_BL33_BASE;
81 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry();
82 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
83
84#ifdef K3_HW_CONFIG_BASE
85 /*
86 * According to the file ``Documentation/arm64/booting.txt`` of the
87 * Linux kernel tree, Linux expects the physical address of the device
88 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
89 * must be 0.
90 */
91 bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE;
92 bl33_image_ep_info.args.arg1 = 0U;
93 bl33_image_ep_info.args.arg2 = 0U;
94 bl33_image_ep_info.args.arg3 = 0U;
95#endif
Nishanth Menon0192f892016-10-14 01:13:34 +000096}
97
Nishanth Menon0192f892016-10-14 01:13:34 +000098void bl31_plat_arch_setup(void)
99{
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100100
101 const mmap_region_t bl_regions[] = {
102 MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE,
103 MT_MEMORY | MT_RW | MT_SECURE),
104 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
105 MT_CODE | MT_SECURE),
106 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_END,
107 MT_RO_DATA | MT_SECURE),
108 {0}
109 };
110
Roberto Vargas344ff022018-10-19 16:44:18 +0100111 setup_page_tables(bl_regions, plat_arm_get_mmap());
Nishanth Menon3ed1b282016-10-14 01:13:45 +0000112 enable_mmu_el3(0);
Nishanth Menon0192f892016-10-14 01:13:34 +0000113}
114
115void bl31_platform_setup(void)
116{
Nishanth Menonf97ad372016-10-14 01:13:49 +0000117 k3_gic_driver_init(K3_GICD_BASE, K3_GICR_BASE);
118 k3_gic_init();
Andrew F. Davisa513b2a2018-05-04 19:06:09 +0000119
120 ti_sci_init();
Nishanth Menon0192f892016-10-14 01:13:34 +0000121}
122
123void platform_mem_init(void)
124{
125 /* Do nothing for now... */
126}
127
Nishanth Menon1f0b51b2016-10-14 01:13:48 +0000128unsigned int plat_get_syscnt_freq2(void)
129{
130 return SYS_COUNTER_FREQ_IN_TICKS;
131}
132
Nishanth Menon0192f892016-10-14 01:13:34 +0000133/*
134 * Empty function to prevent the console from being uninitialized after BL33 is
135 * started and allow us to see messages from BL31.
136 */
137void bl31_plat_runtime_setup(void)
138{
139}
140
141/*******************************************************************************
142 * Return a pointer to the 'entry_point_info' structure of the next image
143 * for the security state specified. BL3-3 corresponds to the non-secure
144 * image type while BL3-2 corresponds to the secure image type. A NULL
145 * pointer is returned if the image does not exist.
146 ******************************************************************************/
147entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
148{
Benjamin Faire62e5772016-10-14 01:13:52 +0000149 entry_point_info_t *next_image_info;
150
151 assert(sec_state_is_valid(type));
152 next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info :
153 &bl32_image_ep_info;
154 /*
155 * None of the images on the ARM development platforms can have 0x0
156 * as the entrypoint
157 */
158 if (next_image_info->pc)
159 return next_image_info;
160
161 NOTICE("Requested nonexistent image\n");
Nishanth Menon0192f892016-10-14 01:13:34 +0000162 return NULL;
163}