Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <arch_helpers.h> |
| 9 | #include <assert.h> |
| 10 | #include <bl_common.h> |
| 11 | #include <debug.h> |
Nishanth Menon | ce97604 | 2016-10-14 01:13:44 +0000 | [diff] [blame] | 12 | #include <k3_console.h> |
Nishanth Menon | 3ed1b28 | 2016-10-14 01:13:45 +0000 | [diff] [blame] | 13 | #include <plat_arm.h> |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 14 | #include <platform_def.h> |
| 15 | #include <string.h> |
| 16 | |
Nishanth Menon | 3ed1b28 | 2016-10-14 01:13:45 +0000 | [diff] [blame] | 17 | /* Table of regions to map using the MMU */ |
| 18 | const mmap_region_t plat_arm_mmap[] = { |
| 19 | MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_DEVICE | MT_RW | MT_SECURE), |
Nishanth Menon | ce97604 | 2016-10-14 01:13:44 +0000 | [diff] [blame] | 20 | MAP_REGION_FLAT(K3_USART_BASE_ADDRESS, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE), |
Nishanth Menon | 3ed1b28 | 2016-10-14 01:13:45 +0000 | [diff] [blame] | 21 | { /* sentinel */ } |
| 22 | }; |
| 23 | |
Benjamin Fair | e62e577 | 2016-10-14 01:13:52 +0000 | [diff] [blame] | 24 | /* |
| 25 | * Placeholder variables for maintaining information about the next image(s) |
| 26 | */ |
| 27 | static entry_point_info_t bl32_image_ep_info; |
| 28 | static entry_point_info_t bl33_image_ep_info; |
| 29 | |
| 30 | /******************************************************************************* |
| 31 | * Gets SPSR for BL33 entry |
| 32 | ******************************************************************************/ |
| 33 | static uint32_t k3_get_spsr_for_bl33_entry(void) |
| 34 | { |
| 35 | unsigned long el_status; |
| 36 | unsigned int mode; |
| 37 | uint32_t spsr; |
| 38 | |
| 39 | /* Figure out what mode we enter the non-secure world in */ |
| 40 | el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; |
| 41 | el_status &= ID_AA64PFR0_ELX_MASK; |
| 42 | |
| 43 | mode = (el_status) ? MODE_EL2 : MODE_EL1; |
| 44 | |
| 45 | spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); |
| 46 | return spsr; |
| 47 | } |
| 48 | |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 49 | /******************************************************************************* |
| 50 | * Perform any BL3-1 early platform setup, such as console init and deciding on |
| 51 | * memory layout. |
| 52 | ******************************************************************************/ |
| 53 | void bl31_early_platform_setup(bl31_params_t *from_bl2, |
| 54 | void *plat_params_from_bl2) |
| 55 | { |
| 56 | /* There are no parameters from BL2 if BL31 is a reset vector */ |
| 57 | assert(from_bl2 == NULL); |
| 58 | assert(plat_params_from_bl2 == NULL); |
Benjamin Fair | e62e577 | 2016-10-14 01:13:52 +0000 | [diff] [blame] | 59 | |
Nishanth Menon | ce97604 | 2016-10-14 01:13:44 +0000 | [diff] [blame] | 60 | bl31_console_setup(); |
| 61 | |
Benjamin Fair | e62e577 | 2016-10-14 01:13:52 +0000 | [diff] [blame] | 62 | #ifdef BL32_BASE |
| 63 | /* Populate entry point information for BL32 */ |
| 64 | SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); |
| 65 | bl32_image_ep_info.pc = BL32_BASE; |
| 66 | bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, |
| 67 | DISABLE_ALL_EXCEPTIONS); |
| 68 | SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); |
| 69 | #endif |
| 70 | |
| 71 | /* Populate entry point information for BL33 */ |
| 72 | SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); |
| 73 | bl33_image_ep_info.pc = PRELOADED_BL33_BASE; |
| 74 | bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); |
| 75 | SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); |
| 76 | |
| 77 | #ifdef K3_HW_CONFIG_BASE |
| 78 | /* |
| 79 | * According to the file ``Documentation/arm64/booting.txt`` of the |
| 80 | * Linux kernel tree, Linux expects the physical address of the device |
| 81 | * tree blob (DTB) in x0, while x1-x3 are reserved for future use and |
| 82 | * must be 0. |
| 83 | */ |
| 84 | bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; |
| 85 | bl33_image_ep_info.args.arg1 = 0U; |
| 86 | bl33_image_ep_info.args.arg2 = 0U; |
| 87 | bl33_image_ep_info.args.arg3 = 0U; |
| 88 | #endif |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 89 | } |
| 90 | |
| 91 | void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, |
| 92 | u_register_t arg2, u_register_t arg3) |
| 93 | { |
| 94 | bl31_early_platform_setup((void *)arg0, (void *)arg1); |
| 95 | } |
| 96 | |
| 97 | void bl31_plat_arch_setup(void) |
| 98 | { |
Nishanth Menon | 3ed1b28 | 2016-10-14 01:13:45 +0000 | [diff] [blame] | 99 | arm_setup_page_tables(BL31_BASE, |
| 100 | BL31_END - BL31_BASE, |
| 101 | BL_CODE_BASE, |
| 102 | BL_CODE_END, |
| 103 | BL_RO_DATA_BASE, |
| 104 | BL_RO_DATA_END); |
| 105 | enable_mmu_el3(0); |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | void bl31_platform_setup(void) |
| 109 | { |
| 110 | /* TODO: Initialize the GIC CPU and distributor interfaces */ |
| 111 | } |
| 112 | |
| 113 | void platform_mem_init(void) |
| 114 | { |
| 115 | /* Do nothing for now... */ |
| 116 | } |
| 117 | |
Nishanth Menon | 1f0b51b | 2016-10-14 01:13:48 +0000 | [diff] [blame^] | 118 | unsigned int plat_get_syscnt_freq2(void) |
| 119 | { |
| 120 | return SYS_COUNTER_FREQ_IN_TICKS; |
| 121 | } |
| 122 | |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 123 | /* |
| 124 | * Empty function to prevent the console from being uninitialized after BL33 is |
| 125 | * started and allow us to see messages from BL31. |
| 126 | */ |
| 127 | void bl31_plat_runtime_setup(void) |
| 128 | { |
| 129 | } |
| 130 | |
| 131 | /******************************************************************************* |
| 132 | * Return a pointer to the 'entry_point_info' structure of the next image |
| 133 | * for the security state specified. BL3-3 corresponds to the non-secure |
| 134 | * image type while BL3-2 corresponds to the secure image type. A NULL |
| 135 | * pointer is returned if the image does not exist. |
| 136 | ******************************************************************************/ |
| 137 | entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) |
| 138 | { |
Benjamin Fair | e62e577 | 2016-10-14 01:13:52 +0000 | [diff] [blame] | 139 | entry_point_info_t *next_image_info; |
| 140 | |
| 141 | assert(sec_state_is_valid(type)); |
| 142 | next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : |
| 143 | &bl32_image_ep_info; |
| 144 | /* |
| 145 | * None of the images on the ARM development platforms can have 0x0 |
| 146 | * as the entrypoint |
| 147 | */ |
| 148 | if (next_image_info->pc) |
| 149 | return next_image_info; |
| 150 | |
| 151 | NOTICE("Requested nonexistent image\n"); |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 152 | return NULL; |
| 153 | } |