Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 1 | /* |
Roberto Vargas | 2b36b15 | 2018-02-12 12:36:17 +0000 | [diff] [blame] | 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CSS_PM_H__ |
| 8 | #define __CSS_PM_H__ |
| 9 | |
| 10 | #include <cdefs.h> |
| 11 | #include <psci.h> |
| 12 | #include <types.h> |
| 13 | |
Soby Mathew | 7a3b5eb | 2016-12-09 15:23:08 +0000 | [diff] [blame] | 14 | /* System power domain at level 2, as currently implemented by CSS platforms */ |
| 15 | #define CSS_SYSTEM_PWR_DMN_LVL ARM_PWR_LVL2 |
| 16 | |
Soby Mathew | 200fffd | 2016-10-21 11:34:59 +0100 | [diff] [blame] | 17 | /* Macros to read the CSS power domain state */ |
| 18 | #define CSS_CORE_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL0] |
| 19 | #define CSS_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL1] |
Soby Mathew | 7a3b5eb | 2016-12-09 15:23:08 +0000 | [diff] [blame] | 20 | #define CSS_SYSTEM_PWR_STATE(state) \ |
| 21 | ((PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL) ?\ |
| 22 | (state)->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL] : 0) |
Soby Mathew | 200fffd | 2016-10-21 11:34:59 +0100 | [diff] [blame] | 23 | |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 24 | int css_pwr_domain_on(u_register_t mpidr); |
| 25 | void css_pwr_domain_on_finish(const psci_power_state_t *target_state); |
| 26 | void css_pwr_domain_off(const psci_power_state_t *target_state); |
| 27 | void css_pwr_domain_suspend(const psci_power_state_t *target_state); |
| 28 | void css_pwr_domain_suspend_finish( |
| 29 | const psci_power_state_t *target_state); |
| 30 | void __dead2 css_system_off(void); |
| 31 | void __dead2 css_system_reset(void); |
| 32 | void css_cpu_standby(plat_local_state_t cpu_state); |
Soby Mathew | 61e8d0b | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 33 | void css_get_sys_suspend_power_state(psci_power_state_t *req_state); |
Jeenu Viswambharan | 9cc4fc0 | 2016-08-04 09:43:15 +0100 | [diff] [blame] | 34 | int css_node_hw_state(u_register_t mpidr, unsigned int power_level); |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 35 | |
Roberto Vargas | 2b36b15 | 2018-02-12 12:36:17 +0000 | [diff] [blame] | 36 | /* |
| 37 | * This mapping array has to be exported by the platform. Each element at |
| 38 | * a given index maps that core to an SCMI power domain. |
| 39 | */ |
| 40 | extern const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[]; |
| 41 | |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 42 | #endif /* __CSS_PM_H__ */ |