Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 1 | # |
Maxime Méré | c6a33f5 | 2024-12-10 10:55:58 +0100 | [diff] [blame] | 2 | # Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
Yann Gautier | 605facb | 2023-01-05 14:34:37 +0100 | [diff] [blame] | 7 | # Extra partitions used to find FIP, contains: |
| 8 | # metadata (2) and fsbl-m (2) and the FIP partitions (default is 2). |
| 9 | STM32_EXTRA_PARTS := 6 |
| 10 | |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 11 | include plat/st/common/common.mk |
| 12 | |
| 13 | CRASH_REPORTING := 1 |
Maxime Méré | c6a33f5 | 2024-12-10 10:55:58 +0100 | [diff] [blame] | 14 | # Disable PIE by default. To re-enable it, uncomment next line. |
| 15 | #ENABLE_PIE := 1 |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 16 | PROGRAMMABLE_RESET_ADDRESS := 1 |
Maxime Méré | c6a33f5 | 2024-12-10 10:55:58 +0100 | [diff] [blame] | 17 | ifeq ($(ENABLE_PIE),1) |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 18 | BL2_IN_XIP_MEM := 1 |
Maxime Méré | c6a33f5 | 2024-12-10 10:55:58 +0100 | [diff] [blame] | 19 | endif |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 20 | |
Yann Gautier | 9542b80 | 2024-01-11 19:34:24 +0100 | [diff] [blame] | 21 | STM32MP_BL33_EL1 ?= 1 |
| 22 | ifeq ($(STM32MP_BL33_EL1),1) |
| 23 | INIT_UNUSED_NS_EL2 := 1 |
| 24 | endif |
| 25 | |
Yann Gautier | 4a95253 | 2023-10-02 09:42:50 +0200 | [diff] [blame] | 26 | # Disable features unsupported in ARMv8.0 |
| 27 | ENABLE_SPE_FOR_NS := 0 |
| 28 | ENABLE_SVE_FOR_NS := 0 |
| 29 | |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 30 | # Default Device tree |
| 31 | DTB_FILE_NAME ?= stm32mp257f-ev1.dtb |
| 32 | |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 33 | STM32MP21 ?= 0 |
Nicolas Le Bayon | 48112d5 | 2024-02-02 18:28:43 +0100 | [diff] [blame] | 34 | STM32MP23 ?= 0 |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 35 | STM32MP25 ?= 0 |
| 36 | |
| 37 | ifneq ($(findstring stm32mp21,$(DTB_FILE_NAME)),) |
| 38 | STM32MP21 := 1 |
| 39 | endif |
Nicolas Le Bayon | 48112d5 | 2024-02-02 18:28:43 +0100 | [diff] [blame] | 40 | ifneq ($(findstring stm32mp23,$(DTB_FILE_NAME)),) |
| 41 | STM32MP23 := 1 |
| 42 | endif |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 43 | ifneq ($(findstring stm32mp25,$(DTB_FILE_NAME)),) |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 44 | STM32MP25 := 1 |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 45 | endif |
Nicolas Le Bayon | 48112d5 | 2024-02-02 18:28:43 +0100 | [diff] [blame] | 46 | ifneq ($(filter 1,$(STM32MP21) $(STM32MP23) $(STM32MP25)), 1) |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 47 | $(warning STM32MP21=$(STM32MP21)) |
Nicolas Le Bayon | 48112d5 | 2024-02-02 18:28:43 +0100 | [diff] [blame] | 48 | $(warning STM32MP23=$(STM32MP23)) |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 49 | $(warning STM32MP25=$(STM32MP25)) |
| 50 | $(warning DTB_FILE_NAME=$(DTB_FILE_NAME)) |
Nicolas Le Bayon | 48112d5 | 2024-02-02 18:28:43 +0100 | [diff] [blame] | 51 | $(error Cannot enable more than one STM32MP2x flag) |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 52 | endif |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 53 | |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 54 | # STM32 image header version v2.2 or v2.3 for STM32MP21 |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 55 | STM32_HEADER_VERSION_MAJOR := 2 |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 56 | ifeq ($(STM32MP21),1) |
| 57 | STM32_HEADER_VERSION_MINOR := 3 |
| 58 | else |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 59 | STM32_HEADER_VERSION_MINOR := 2 |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 60 | endif |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 61 | |
Yann Gautier | 7d13b4e | 2024-02-02 17:07:20 +0100 | [diff] [blame] | 62 | # Set load address for serial boot devices |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 63 | DWL_BUFFER_BASE ?= 0x87000000 |
Yann Gautier | 7d13b4e | 2024-02-02 17:07:20 +0100 | [diff] [blame] | 64 | |
Nicolas Le Bayon | caff04c | 2021-07-05 15:23:54 +0200 | [diff] [blame] | 65 | # DDR types |
| 66 | STM32MP_DDR3_TYPE ?= 0 |
| 67 | STM32MP_DDR4_TYPE ?= 0 |
| 68 | STM32MP_LPDDR4_TYPE ?= 0 |
| 69 | ifeq (${STM32MP_DDR3_TYPE},1) |
| 70 | DDR_TYPE := ddr3 |
| 71 | endif |
| 72 | ifeq (${STM32MP_DDR4_TYPE},1) |
| 73 | DDR_TYPE := ddr4 |
| 74 | endif |
| 75 | ifeq (${STM32MP_LPDDR4_TYPE},1) |
| 76 | DDR_TYPE := lpddr4 |
| 77 | endif |
| 78 | |
Maxime Méré | b151f68 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 79 | # DDR features |
Nicolas Le Bayon | 068d341 | 2021-07-01 14:44:22 +0200 | [diff] [blame] | 80 | STM32MP_DDR_DUAL_AXI_PORT := 1 |
Maxime Méré | b151f68 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 81 | STM32MP_DDR_FIP_IO_STORAGE := 1 |
| 82 | |
Yann Gautier | 626ec9d | 2023-06-14 18:44:41 +0200 | [diff] [blame] | 83 | # Device tree |
| 84 | BL2_DTSI := stm32mp25-bl2.dtsi |
| 85 | FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME))) |
Maxime Méré | 212148f | 2024-10-02 18:24:40 +0200 | [diff] [blame] | 86 | BL31_DTSI := stm32mp25-bl31.dtsi |
| 87 | FDT_SOURCES += $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl31.dts,$(DTB_FILE_NAME))) |
Yann Gautier | 626ec9d | 2023-06-14 18:44:41 +0200 | [diff] [blame] | 88 | |
| 89 | # Macros and rules to build TF binary |
| 90 | STM32_TF_STM32 := $(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME))) |
| 91 | STM32_LD_FILE := plat/st/stm32mp2/${ARCH}/stm32mp2.ld.S |
| 92 | STM32_BINARY_MAPPING := plat/st/stm32mp2/${ARCH}/stm32mp2.S |
| 93 | |
Yann Gautier | 99f4132 | 2024-05-22 16:16:59 +0200 | [diff] [blame] | 94 | STM32MP_FW_CONFIG_NAME := $(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME)) |
| 95 | STM32MP_FW_CONFIG := ${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME) |
Maxime Méré | 212148f | 2024-10-02 18:24:40 +0200 | [diff] [blame] | 96 | STM32MP_SOC_FW_CONFIG := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl31.dtb,$(DTB_FILE_NAME))) |
Maxime Méré | b151f68 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 97 | ifeq (${STM32MP_DDR_FIP_IO_STORAGE},1) |
| 98 | STM32MP_DDR_FW_PATH ?= drivers/st/ddr/phy/firmware/bin/stm32mp2 |
| 99 | STM32MP_DDR_FW_NAME := ${DDR_TYPE}_pmu_train.bin |
| 100 | STM32MP_DDR_FW := ${STM32MP_DDR_FW_PATH}/${STM32MP_DDR_FW_NAME} |
| 101 | endif |
Yann Gautier | 99f4132 | 2024-05-22 16:16:59 +0200 | [diff] [blame] | 102 | FDT_SOURCES += $(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME))) |
Yann Gautier | 7199aad | 2024-11-14 09:44:44 +0100 | [diff] [blame] | 103 | |
Yann Gautier | 99f4132 | 2024-05-22 16:16:59 +0200 | [diff] [blame] | 104 | # Add the FW_CONFIG to FIP and specify the same to certtool |
| 105 | $(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config)) |
Yann Gautier | 7199aad | 2024-11-14 09:44:44 +0100 | [diff] [blame] | 106 | |
Maxime Méré | 212148f | 2024-10-02 18:24:40 +0200 | [diff] [blame] | 107 | # Add the SOC_FW_CONFIG to FIP and specify the same to certtool |
Yann Gautier | 7199aad | 2024-11-14 09:44:44 +0100 | [diff] [blame] | 108 | $(eval $(call TOOL_ADD_IMG_PAYLOAD,STM32MP_SOC_FW_CONFIG,$(STM32MP_SOC_FW_CONFIG),--soc-fw-config,$(patsubst %.dtb,%.dts,$(STM32MP_SOC_FW_CONFIG)))) |
| 109 | |
Maxime Méré | b151f68 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 110 | ifeq (${STM32MP_DDR_FIP_IO_STORAGE},1) |
| 111 | # Add the FW_DDR to FIP and specify the same to certtool |
| 112 | $(eval $(call TOOL_ADD_IMG,STM32MP_DDR_FW,--ddr-fw)) |
| 113 | endif |
Yann Gautier | 99f4132 | 2024-05-22 16:16:59 +0200 | [diff] [blame] | 114 | |
Boerge Struempfel | 1302eac | 2025-04-01 11:57:20 +0200 | [diff] [blame] | 115 | # Ultratronik Specific Boards |
| 116 | ifeq ($(findstring ultra-fly,$(DTB_FILE_NAME)),ultra-fly) |
| 117 | ULTRA_FLY := 1 |
| 118 | $(eval $(call assert_booleans,\ |
| 119 | $(sort \ |
| 120 | ULTRA_FLY \ |
| 121 | ))) |
| 122 | $(eval $(call add_defines,\ |
| 123 | $(sort \ |
| 124 | ULTRA_FLY \ |
| 125 | ))) |
| 126 | endif |
| 127 | |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 128 | # Enable flags for C files |
| 129 | $(eval $(call assert_booleans,\ |
| 130 | $(sort \ |
Nicolas Le Bayon | 068d341 | 2021-07-01 14:44:22 +0200 | [diff] [blame] | 131 | STM32MP_DDR_DUAL_AXI_PORT \ |
Maxime Méré | b151f68 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 132 | STM32MP_DDR_FIP_IO_STORAGE \ |
Nicolas Le Bayon | caff04c | 2021-07-05 15:23:54 +0200 | [diff] [blame] | 133 | STM32MP_DDR3_TYPE \ |
| 134 | STM32MP_DDR4_TYPE \ |
| 135 | STM32MP_LPDDR4_TYPE \ |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 136 | STM32MP21 \ |
Nicolas Le Bayon | 48112d5 | 2024-02-02 18:28:43 +0100 | [diff] [blame] | 137 | STM32MP23 \ |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 138 | STM32MP25 \ |
Yann Gautier | 9542b80 | 2024-01-11 19:34:24 +0100 | [diff] [blame] | 139 | STM32MP_BL33_EL1 \ |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 140 | ))) |
| 141 | |
| 142 | $(eval $(call assert_numerics,\ |
| 143 | $(sort \ |
| 144 | PLAT_PARTITION_MAX_ENTRIES \ |
| 145 | STM32_HEADER_VERSION_MAJOR \ |
| 146 | STM32_TF_A_COPIES \ |
| 147 | ))) |
| 148 | |
Yann Gautier | 7d13b4e | 2024-02-02 17:07:20 +0100 | [diff] [blame] | 149 | $(eval $(call add_defines,\ |
| 150 | $(sort \ |
| 151 | DWL_BUFFER_BASE \ |
Maxime Méré | b151f68 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 152 | PLAT_DEF_FIP_UUID \ |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 153 | PLAT_PARTITION_MAX_ENTRIES \ |
| 154 | PLAT_TBBR_IMG_DEF \ |
| 155 | STM32_TF_A_COPIES \ |
Nicolas Le Bayon | 068d341 | 2021-07-01 14:44:22 +0200 | [diff] [blame] | 156 | STM32MP_DDR_DUAL_AXI_PORT \ |
Maxime Méré | b151f68 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 157 | STM32MP_DDR_FIP_IO_STORAGE \ |
Nicolas Le Bayon | caff04c | 2021-07-05 15:23:54 +0200 | [diff] [blame] | 158 | STM32MP_DDR3_TYPE \ |
| 159 | STM32MP_DDR4_TYPE \ |
| 160 | STM32MP_LPDDR4_TYPE \ |
Yann Gautier | 7d6dffa | 2023-04-20 17:02:52 +0200 | [diff] [blame] | 161 | STM32MP21 \ |
Nicolas Le Bayon | 48112d5 | 2024-02-02 18:28:43 +0100 | [diff] [blame] | 162 | STM32MP23 \ |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 163 | STM32MP25 \ |
Yann Gautier | 9542b80 | 2024-01-11 19:34:24 +0100 | [diff] [blame] | 164 | STM32MP_BL33_EL1 \ |
Yann Gautier | 7d13b4e | 2024-02-02 17:07:20 +0100 | [diff] [blame] | 165 | ))) |
| 166 | |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 167 | # STM32MP2x is based on Cortex-A35, which is Armv8.0, and does not support BTI |
| 168 | # Disable mbranch-protection to avoid adding useless code |
| 169 | TF_CFLAGS += -mbranch-protection=none |
| 170 | |
| 171 | # Include paths and source files |
| 172 | PLAT_INCLUDES += -Iplat/st/stm32mp2/include/ |
Nicolas Le Bayon | 068d341 | 2021-07-01 14:44:22 +0200 | [diff] [blame] | 173 | PLAT_INCLUDES += -Idrivers/st/ddr/phy/phyinit/include/ |
| 174 | PLAT_INCLUDES += -Idrivers/st/ddr/phy/firmware/include/ |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 175 | |
| 176 | PLAT_BL_COMMON_SOURCES += lib/cpus/${ARCH}/cortex_a35.S |
Yann Gautier | eb91af5 | 2023-06-14 18:05:47 +0200 | [diff] [blame] | 177 | PLAT_BL_COMMON_SOURCES += drivers/st/uart/${ARCH}/stm32_console.S |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 178 | PLAT_BL_COMMON_SOURCES += plat/st/stm32mp2/${ARCH}/stm32mp2_helper.S |
| 179 | |
Pascal Paillet | 3263aea | 2022-12-16 14:59:34 +0100 | [diff] [blame] | 180 | PLAT_BL_COMMON_SOURCES += drivers/st/pmic/stm32mp_pmic2.c \ |
| 181 | drivers/st/pmic/stpmic2.c \ |
| 182 | |
| 183 | PLAT_BL_COMMON_SOURCES += drivers/st/i2c/stm32_i2c.c |
| 184 | |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 185 | PLAT_BL_COMMON_SOURCES += plat/st/stm32mp2/stm32mp2_private.c |
| 186 | |
Gabriel Fernandez | 3043743 | 2022-04-20 10:08:08 +0200 | [diff] [blame] | 187 | PLAT_BL_COMMON_SOURCES += drivers/st/bsec/bsec3.c \ |
Yann Gautier | d58a3d2 | 2024-05-21 12:05:43 +0200 | [diff] [blame] | 188 | drivers/st/reset/stm32mp2_reset.c \ |
| 189 | plat/st/stm32mp2/stm32mp2_syscfg.c |
Yann Gautier | a585d76 | 2024-01-03 14:28:23 +0100 | [diff] [blame] | 190 | |
Gabriel Fernandez | bcd9506 | 2022-04-20 10:08:49 +0200 | [diff] [blame] | 191 | PLAT_BL_COMMON_SOURCES += drivers/st/clk/clk-stm32-core.c \ |
| 192 | drivers/st/clk/clk-stm32mp2.c |
| 193 | |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 194 | BL2_SOURCES += plat/st/stm32mp2/plat_bl2_mem_params_desc.c |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 195 | |
Pascal Paillet | 0e1727c | 2023-01-18 11:47:10 +0100 | [diff] [blame] | 196 | BL2_SOURCES += plat/st/stm32mp2/bl2_plat_setup.c \ |
| 197 | plat/st/stm32mp2/plat_ddr.c |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 198 | |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 199 | ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),) |
| 200 | BL2_SOURCES += drivers/st/mmc/stm32_sdmmc2.c |
| 201 | endif |
| 202 | |
Yann Gautier | 7d13b4e | 2024-02-02 17:07:20 +0100 | [diff] [blame] | 203 | ifeq (${STM32MP_USB_PROGRAMMER},1) |
| 204 | BL2_SOURCES += plat/st/stm32mp2/stm32mp2_usb_dfu.c |
| 205 | endif |
| 206 | |
Nicolas Le Bayon | 068d341 | 2021-07-01 14:44:22 +0200 | [diff] [blame] | 207 | BL2_SOURCES += drivers/st/ddr/stm32mp2_ddr.c \ |
| 208 | drivers/st/ddr/stm32mp2_ddr_helpers.c \ |
| 209 | drivers/st/ddr/stm32mp2_ram.c |
| 210 | |
| 211 | BL2_SOURCES += drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_c_initphyconfig.c \ |
| 212 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_calcmb.c \ |
| 213 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_i_loadpieimage.c \ |
| 214 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_initstruct.c \ |
| 215 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_isdbytedisabled.c \ |
| 216 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_loadpieprodcode.c \ |
| 217 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_mapdrvstren.c \ |
| 218 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_progcsrskiptrain.c \ |
| 219 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_reginterface.c \ |
| 220 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_restore_sequence.c \ |
| 221 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_sequence.c \ |
| 222 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_softsetmb.c \ |
| 223 | drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_custompretrain.c \ |
| 224 | drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_saveretregs.c |
| 225 | |
| 226 | BL2_SOURCES += drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_d_loadimem.c \ |
| 227 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_f_loaddmem.c \ |
| 228 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_g_execfw.c \ |
| 229 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_writeoutmem.c \ |
| 230 | drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_g_waitfwdone.c |
Yann Gautier | 40ff138 | 2024-05-21 20:54:04 +0200 | [diff] [blame] | 231 | |
Yann Gautier | ece4c25 | 2023-06-13 18:45:03 +0200 | [diff] [blame] | 232 | # BL31 sources |
| 233 | BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} |
| 234 | |
| 235 | BL31_SOURCES += plat/st/stm32mp2/bl31_plat_setup.c \ |
| 236 | plat/st/stm32mp2/stm32mp2_pm.c \ |
| 237 | plat/st/stm32mp2/stm32mp2_topology.c |
| 238 | # Generic GIC v2 |
| 239 | include drivers/arm/gic/v2/gicv2.mk |
| 240 | |
| 241 | BL31_SOURCES += ${GICV2_SOURCES} \ |
| 242 | plat/common/plat_gicv2.c \ |
| 243 | plat/st/common/stm32mp_gic.c |
| 244 | |
| 245 | # Generic PSCI |
| 246 | BL31_SOURCES += plat/common/plat_psci_common.c |
| 247 | |
Gatien Chevallier | 77f2a32 | 2022-07-27 17:57:35 +0200 | [diff] [blame] | 248 | BL31_SOURCES += plat/st/common/stm32mp_svc_setup.c \ |
Gatien Chevallier | 2464800 | 2022-07-27 17:57:35 +0200 | [diff] [blame] | 249 | plat/st/stm32mp2/services/stgen_svc.c \ |
Gatien Chevallier | 77f2a32 | 2022-07-27 17:57:35 +0200 | [diff] [blame] | 250 | plat/st/stm32mp2/services/stm32mp2_svc_setup.c |
| 251 | |
| 252 | # Arm Archtecture services |
| 253 | BL31_SOURCES += services/arm_arch_svc/arm_arch_svc_setup.c |
| 254 | |
Yann Gautier | 8053f2b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 255 | # Compilation rules |
Nicolas Le Bayon | caff04c | 2021-07-05 15:23:54 +0200 | [diff] [blame] | 256 | .PHONY: check_ddr_type |
Nicolas Le Bayon | caff04c | 2021-07-05 15:23:54 +0200 | [diff] [blame] | 257 | bl2: check_ddr_type |
| 258 | |
| 259 | check_ddr_type: |
| 260 | $(eval DDR_TYPE = $(shell echo $$(($(STM32MP_DDR3_TYPE) + \ |
| 261 | $(STM32MP_DDR4_TYPE) + \ |
| 262 | $(STM32MP_LPDDR4_TYPE))))) |
| 263 | @if [ ${DDR_TYPE} != 1 ]; then \ |
| 264 | echo "One and only one DDR type must be defined"; \ |
| 265 | false; \ |
| 266 | fi |
| 267 | |
Maxime Méré | 212148f | 2024-10-02 18:24:40 +0200 | [diff] [blame] | 268 | # Create DTB file for BL31 |
| 269 | ${BUILD_PLAT}/fdts/%-bl31.dts: fdts/%.dts fdts/${BL31_DTSI} | $$(@D)/ |
| 270 | @echo '#include "$(patsubst fdts/%,%,$<)"' > $@ |
| 271 | @echo '#include "${BL31_DTSI}"' >> $@ |
| 272 | |
Yann Gautier | a3f4638 | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 273 | include plat/st/common/common_rules.mk |