Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / 51abc34753abceff89453fe86601fd5e1a527ad1 / . / plat / arm / board / juno / platform.mk
blob: fee4391d25f3d76e810d9ee0e44a0b24aac46b98 [file] [log] [blame]
Sandrine Bailleux798140d2014-07-17 16:06:39 +0100[diff] [blame]1#
dp-arm8f59e152017-02-27 12:21:43 +0000[diff] [blame]2# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
Sandrine Bailleux798140d2014-07-17 16:06:39 +0100[diff] [blame]3#
dp-armfa3cf0b2017-05-03 09:38:09 +0100[diff] [blame]4# SPDX-License-Identifier: BSD-3-Clause
Sandrine Bailleux798140d2014-07-17 16:06:39 +0100[diff] [blame]5#
6
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000[diff] [blame]7JUNO_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
8 drivers/arm/gic/v2/gicv2_main.c \
9 drivers/arm/gic/v2/gicv2_helpers.c \
10 plat/common/plat_gicv2.c \
11 plat/arm/common/arm_gicv2.c
12
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000[diff] [blame]13JUNO_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c \
14 plat/arm/common/arm_cci.c
15
Soby Mathew9c708b52016-02-26 14:23:19 +0000[diff] [blame]16JUNO_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000[diff] [blame]17 plat/arm/board/juno/juno_security.c \
dp-arm8f59e152017-02-27 12:21:43 +0000[diff] [blame]18 plat/arm/board/juno/juno_trng.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000[diff] [blame]19 plat/arm/common/arm_tzc400.c
20
dp-armb3263b32017-02-28 14:43:15 +0000[diff] [blame]21ifneq (${ENABLE_STACK_PROTECTOR}, 0)
22JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c
23endif
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000[diff] [blame]24
Dan Handley8e930fe2015-04-27 19:34:53 +0100[diff] [blame]25PLAT_INCLUDES := -Iplat/arm/board/juno/include
Juan Castillo921b8772014-09-05 17:29:38 +0100[diff] [blame]26
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000[diff] [blame]27PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S
Juan Castillo921b8772014-09-05 17:29:38 +0100[diff] [blame]28
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000[diff] [blame]29# Flag to enable support for AArch32 state on JUNO
30JUNO_AARCH32_EL3_RUNTIME := 0
31$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME))
32$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
33
Soby Mathewbf169232017-11-14 14:10:10 +0000[diff] [blame]34ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
35# Include BL32 in FIP
36NEED_BL32 := yes
37# BL31 is not required
38override BL31_SOURCES =
39
40# The BL32 needs to be built separately invoking the AARCH32 compiler and
41# be specifed via `BL32` build option.
42 ifneq (${ARCH}, aarch32)
43 override BL32_SOURCES =
44 endif
45endif
46
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000[diff] [blame]47ifeq (${ARCH},aarch64)
Dan Handley7bef8002015-03-19 19:22:44 +0000[diff] [blame]48BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \
Brendan Jackmana443d222015-10-30 16:25:12 +0000[diff] [blame]49 lib/cpus/aarch64/cortex_a57.S \
Juan Castillob6132f12015-10-06 14:01:35 +0100[diff] [blame]50 lib/cpus/aarch64/cortex_a72.S \
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100[diff] [blame]51 plat/arm/board/juno/juno_bl1_setup.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000[diff] [blame]52 plat/arm/board/juno/juno_err.c \
dp-armb3263b32017-02-28 14:43:15 +0000[diff] [blame]53 ${JUNO_INTERCONNECT_SOURCES} \
54 ${JUNO_SECURITY_SOURCES}
Juan Castillo921b8772014-09-05 17:29:38 +0100[diff] [blame]55
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000[diff] [blame]56BL2_SOURCES += plat/arm/board/juno/juno_err.c \
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000[diff] [blame]57 plat/arm/board/juno/juno_bl2_setup.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000[diff] [blame]58 ${JUNO_SECURITY_SOURCES}
Juan Castillo921b8772014-09-05 17:29:38 +0100[diff] [blame]59
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000[diff] [blame]60BL2U_SOURCES += ${JUNO_SECURITY_SOURCES}
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100[diff] [blame]61
Dan Handley7bef8002015-03-19 19:22:44 +0000[diff] [blame]62BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100[diff] [blame]63 lib/cpus/aarch64/cortex_a57.S \
Brendan Jackmana443d222015-10-30 16:25:12 +0000[diff] [blame]64 lib/cpus/aarch64/cortex_a72.S \
Soby Mathew47e43f22016-02-01 14:04:34 +0000[diff] [blame]65 plat/arm/board/juno/juno_topology.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000[diff] [blame]66 ${JUNO_GIC_SOURCES} \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000[diff] [blame]67 ${JUNO_INTERCONNECT_SOURCES} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000[diff] [blame]68 ${JUNO_SECURITY_SOURCES}
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000[diff] [blame]69endif
Juan Castillo921b8772014-09-05 17:29:38 +0100[diff] [blame]70
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100[diff] [blame]71# Errata workarounds for Cortex-A53:
72ERRATA_A53_826319 := 1
Douglas Raillardd56fb042017-06-19 15:38:02 +0100[diff] [blame]73ERRATA_A53_835769 := 1
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100[diff] [blame]74ERRATA_A53_836870 := 1
Douglas Raillardd56fb042017-06-19 15:38:02 +0100[diff] [blame]75ERRATA_A53_843419 := 1
Andre Przywara00eefd92016-10-06 16:54:53 +0100[diff] [blame]76ERRATA_A53_855873 := 1
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100[diff] [blame]77
78# Errata workarounds for Cortex-A57:
Vikram Kanigirieade34c2016-01-20 15:57:35 +0000[diff] [blame]79ERRATA_A57_806969 := 0
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000[diff] [blame]80ERRATA_A57_813419 := 1
Vikram Kanigirieade34c2016-01-20 15:57:35 +0000[diff] [blame]81ERRATA_A57_813420 := 1
Douglas Raillard71d4fe22017-02-28 17:56:15 +0000[diff] [blame]82ERRATA_A57_826974 := 1
83ERRATA_A57_826977 := 1
84ERRATA_A57_828024 := 1
85ERRATA_A57_829520 := 1
86ERRATA_A57_833471 := 1
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100[diff] [blame]87ERRATA_A57_859972 := 0
Douglas Raillard71d4fe22017-02-28 17:56:15 +0000[diff] [blame]88
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100[diff] [blame]89# Errata workarounds for Cortex-A72:
90ERRATA_A72_859971 := 0
Soby Mathew937488b2014-09-22 14:13:34 +0100[diff] [blame]91
92# Enable option to skip L1 data cache flush during the Cortex-A57 cluster
93# power down sequence
94SKIP_A57_L1_FLUSH_PWR_DWN := 1
Dan Handley7bef8002015-03-19 19:22:44 +0000[diff] [blame]95
Soby Mathewfec4eb72015-07-01 16:16:20 +0100[diff] [blame]96# Disable the PSCI platform compatibility layer
Vikram Kanigirieade34c2016-01-20 15:57:35 +0000[diff] [blame]97ENABLE_PLAT_COMPAT := 0
98
99# Enable memory map related constants optimisation
Antonio Nino Diaz30ce3ad2016-07-25 12:04:31 +0100[diff] [blame]100ARM_BOARD_OPTIMISE_MEM := 1
Soby Mathewfec4eb72015-07-01 16:16:20 +0100[diff] [blame]101
David Cunadoc5b0c0f2017-10-31 23:19:21 +0000[diff] [blame]102# Do not enable SVE
103ENABLE_SVE_FOR_NS := 0
104
Dan Handley7bef8002015-03-19 19:22:44 +0000[diff] [blame]105include plat/arm/board/common/board_css.mk
106include plat/arm/common/arm_common.mk
107include plat/arm/soc/common/soc_css.mk
108include plat/arm/css/common/css_common.mk
Juan Castilloa08a5e72015-05-19 11:54:12 +0100[diff] [blame]109